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i965
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Author
Age
Files
Lines
*
i965/nir/vec4: Implement nir_intrinsic_ssbo_atomic_*
Iago Toral Quiroga
2015-09-25
2
-0
/
+79
*
i965/nir/fs: Implement nir_intrinsic_ssbo_atomic_*
Iago Toral Quiroga
2015-09-25
2
-0
/
+79
*
i965/nir/vec4: Implement nir_intrinsic_load_ssbo
Iago Toral Quiroga
2015-09-25
1
-0
/
+54
*
i965/nir/fs: Implement nir_intrinsic_load_ssbo
Iago Toral Quiroga
2015-09-25
1
-0
/
+62
*
i965/nir/vec4: Implement nir_intrinsic_store_ssbo
Iago Toral Quiroga
2015-09-25
1
-0
/
+148
*
i965/nir/fs: Implement nir_intrinsic_store_ssbo
Iago Toral Quiroga
2015-09-25
1
-0
/
+71
*
i965/vec4: Import surface message builder functions.
Francisco Jerez
2015-09-25
2
-0
/
+273
*
i965/vec4: Import helpers to convert vectors into arrays and back.
Francisco Jerez
2015-09-25
3
-0
/
+130
*
i965/vec4: Introduce VEC4 IR builder.
Francisco Jerez
2015-09-25
2
-0
/
+603
*
i965/wm: surfaces should have the API buffer size, not the drm buffer size
Samuel Iglesias Gonsalvez
2015-09-25
1
-2
/
+2
*
i965/wm: emit null buffer surfaces when null buffers are attached
Samuel Iglesias Gonsalvez
2015-09-25
1
-18
/
+26
*
i965/fs/nir: implement nir_intrinsic_get_buffer_size
Samuel Iglesias Gonsalvez
2015-09-25
1
-0
/
+24
*
i965/fs: Implement FS_OPCODE_GET_BUFFER_SIZE
Samuel Iglesias Gonsalvez
2015-09-25
5
-0
/
+55
*
i965/vec4/nir: implement nir_intrinsic_get_buffer_size
Samuel Iglesias Gonsalvez
2015-09-25
1
-0
/
+26
*
i965/vec4: Implement VS_OPCODE_GET_BUFFER_SIZE
Samuel Iglesias Gonsalvez
2015-09-25
5
-0
/
+44
*
glsl: Add parser/compiler support for unsized array's length()
Samuel Iglesias Gonsalvez
2015-09-25
2
-0
/
+10
*
i965/fs: Do not split buffer variables
Iago Toral Quiroga
2015-09-25
1
-0
/
+1
*
i965: handle visiting of ir_var_shader_storage variables
Iago Toral Quiroga
2015-09-25
1
-2
/
+3
*
i965: Upload Shader Storage Buffer Object surfaces
Iago Toral Quiroga
2015-09-25
2
-13
/
+57
*
i965: Set MaxShaderStorageBuffers for compute shaders
Iago Toral Quiroga
2015-09-25
1
-0
/
+3
*
i965: set ARB_shader_storage_buffer_object related constant values
Samuel Iglesias Gonsalvez
2015-09-25
1
-0
/
+12
*
i965: Implement DriverFlags.NewShaderStorageBuffer
Iago Toral Quiroga
2015-09-25
2
-0
/
+3
*
i965: Use 64-byte offset alignment for shader storage buffers
Iago Toral Quiroga
2015-09-25
1
-0
/
+9
*
i965/cs: Implement DispatchComputeIndirect support
Jordan Justen
2015-09-24
3
-4
/
+60
*
i965/vec4: check swizzle before discarding a uniform on a 3src operand
Alejandro Piñeiro
2015-09-24
1
-3
/
+6
*
i965: Respect stride and subreg_offset for ATTR registers
Kristian Høgsberg Kristensen
2015-09-24
1
-1
/
+4
*
mesa: rework Driver.CopyImageSubData() and related code
Brian Paul
2015-09-24
1
-23
/
+57
*
i965: add ARB_texture_barrier support
Ilia Mirkin
2015-09-23
2
-0
/
+10
*
i965/gs: Fix extra level of indentation left by the previous commit.
Kenneth Graunke
2015-09-23
2
-115
/
+111
*
i965/gs: Use new NIR intrinsics.
Kenneth Graunke
2015-09-23
4
-26
/
+48
*
i965/vec4: Don't coalesce regs in Gen6 MATH ops if reswizzle/writemask needed
Antia Puentes
2015-09-23
2
-3
/
+12
*
i965/vec4: Detect and delete useless MOVs.
Matt Turner
2015-09-22
1
-0
/
+22
*
i965/vec4: Add support for fdph_replicated
Jason Ekstrand
2015-09-22
1
-0
/
+5
*
i965: Add defines for tessellation stages
Chris Forbes
2015-09-22
1
-0
/
+72
*
i965/vec4: refactor brw_vec4_copy_propagation.
Alejandro Piñeiro
2015-09-22
1
-14
/
+18
*
i965: fix textureGrad for cubemaps
Tapani Pälli
2015-09-22
1
-19
/
+182
*
i965: Clean up GLSL compiler option setup
Jason Ekstrand
2015-09-21
1
-26
/
+20
*
i965/skl: Use larger URB size where available.
Ben Widawsky
2015-09-21
1
-1
/
+2
*
i965: Fix MRF register number assertions for compr4.
Kenneth Graunke
2015-09-21
1
-2
/
+2
*
i965/vec4: Use MRF registers 21-23 for spilling in gen6
Iago Toral Quiroga
2015-09-21
1
-4
/
+6
*
i965/fs: Use MRF registers 21-23 for spilling in gen6
Iago Toral Quiroga
2015-09-21
1
-4
/
+7
*
i965: Turn BRW_MAX_MRF into a macro that accepts a hardware generation
Iago Toral Quiroga
2015-09-21
8
-28
/
+28
*
i965: Move MRF register asserts out of brw_reg.h
Iago Toral Quiroga
2015-09-21
4
-7
/
+16
*
i965: Maximum allowed size of SEND messages is 15 (4 bits)
Iago Toral Quiroga
2015-09-21
4
-2
/
+10
*
i965/vec4/nir: Remove all "this->" snippets
Eduardo Lima Mitev
2015-09-20
1
-16
/
+15
*
nir/lower_tex: support projector lowering per sampler type
Rob Clark
2015-09-18
1
-1
/
+4
*
nir: rename nir_lower_tex_projector
Rob Clark
2015-09-18
1
-1
/
+1
*
i965/vec4: Change types as needed to propagate source modifiers using current...
Alejandro Piñeiro
2015-09-19
1
-2
/
+28
*
i965/fs: Fix comparison between signed and unsigned integer expressions
Iago Toral Quiroga
2015-09-18
1
-2
/
+2
*
i965/vec4: Use nir_move_vec_src_uses_to_dest
Jason Ekstrand
2015-09-17
1
-0
/
+3
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