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authorRob Clark <[email protected]>2015-09-16 12:56:58 -0400
committerRob Clark <[email protected]>2015-09-18 21:07:49 -0400
commitfaf5f174ddbc7680f6947ceababb94fdb552bcdb (patch)
treee397325f701a364dcc5010016ccee4a4a852485c /src/mesa/drivers/dri/i965
parentf83ba7bc41a381a0e52c456431dbe1a15176ffb4 (diff)
nir/lower_tex: support projector lowering per sampler type
Some hardware, such as adreno a3xx, supports txp on some but not all sampler types. In this case we want more fine grained control over which texture projectors get lowered. v2: split out nir_lower_tex_options struct to make it easier to add the additional parameters coming in the following patches Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 0d5b6dd7291..b47b87e07dd 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -80,6 +80,9 @@ brw_create_nir(struct brw_context *brw,
struct gl_context *ctx = &brw->ctx;
const nir_shader_compiler_options *options =
ctx->Const.ShaderCompilerOptions[stage].NirOptions;
+ static const nir_lower_tex_options tex_options = {
+ .lower_txp = ~0,
+ };
struct gl_shader *shader = shader_prog ? shader_prog->_LinkedShaders[stage] : NULL;
bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
nir_shader *nir;
@@ -96,7 +99,7 @@ brw_create_nir(struct brw_context *brw,
nir_lower_global_vars_to_local(nir);
nir_validate_shader(nir);
- nir_lower_tex(nir);
+ nir_lower_tex(nir, &tex_options);
nir_validate_shader(nir);
nir_normalize_cubemap_coords(nir);