index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
mesa
/
drivers
/
dri
/
i965
/
gen7_misc_state.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
i965: Move all the depth/stencil/hiz offset logic into the workaround.
Eric Anholt
2012-11-19
1
-79
/
+11
*
i965: Fix rendering to small mipmaps of depth/stencil buffers using a temp mt.
Eric Anholt
2012-10-16
1
-60
/
+40
*
i965: Share the draw x/y offset masking code between main/blorp and all gens.
Eric Anholt
2012-10-16
1
-36
/
+5
*
intel: Add map_stencil_as_y_tiled to intel_region_get_aligned_offset.
Paul Berry
2012-09-12
1
-2
/
+4
*
intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.
Paul Berry
2012-09-12
1
-2
/
+3
*
i965/gen6+: Add support for fast depth clears.
Eric Anholt
2012-05-23
1
-2
/
+2
*
i965/gen7: Set tile_x/y to 0 in the no-stencil case.
Eric Anholt
2012-05-14
1
-1
/
+1
*
i965/Gen7: Work around GPU hangs due to misaligned depth coordinate offsets.
Paul Berry
2012-05-07
1
-0
/
+36
*
i965: Fix mipmap offsets for HiZ and separate stencil buffers.
Paul Berry
2012-05-07
1
-7
/
+72
*
i965: Stop lying about cpp and height of a stencil buffer.
Paul Berry
2012-04-10
1
-1
/
+15
*
i965: Set "Stencil Buffer Enable" bit on Haswell.
Kenneth Graunke
2012-03-30
1
-1
/
+4
*
intel: derive intel_renderbuffer from swrast_renderbuffer
Brian Paul
2012-01-24
1
-4
/
+4
*
i965/gen7: Fix depth buffer rendering to tile offsets.
Eric Anholt
2012-01-12
1
-2
/
+2
*
i965: Fix compiler warnings from hiz changes.
Eric Anholt
2012-01-10
1
-2
/
+0
*
i965/gen7: Fix batch length for 3DSTATE_HIER_DEPTH_BUFFER
Chad Versace
2012-01-10
1
-2
/
+2
*
i965/gen7: Enable HiZ
Chad Versace
2012-01-10
1
-8
/
+23
*
i965: Replace references to stencil region size with buffer size
Chad Versace
2012-01-10
1
-2
/
+4
*
i965: Properly demote the depth mt format for fake packed depth/stencil.
Eric Anholt
2011-12-19
1
-0
/
+1
*
intel: Stop creating the wrapped stencil irb.
Eric Anholt
2011-12-19
1
-10
/
+22
*
i965: Base HW depth format setup based on MESA_FORMAT, not bpp.
Eric Anholt
2011-11-29
1
-29
/
+1
*
intel: Replace intel_renderbuffer::region with a miptree [v3]
Chad Versace
2011-11-21
1
-5
/
+6
*
i965: Remove the validated BO list, now that it's unused.
Eric Anholt
2011-10-29
1
-15
/
+0
*
intel: Rename region->buffer to region->bo, and remove accessor function.
Eric Anholt
2011-09-26
1
-4
/
+4
*
i965: Emit depth stalls and flushes before changing depth state on Gen6+.
Kenneth Graunke
2011-09-26
1
-0
/
+2
*
intel: Move the draw_x/draw_y to the renderbuffer where it belongs.
Eric Anholt
2011-06-13
1
-1
/
+1
*
i965/gen7: Program stencil buffers on Ivybridge.
Kenneth Graunke
2011-06-08
1
-19
/
+42
*
i965/gen7: Add a prepare_depthbuffer function.
Kenneth Graunke
2011-06-08
1
-0
/
+15
*
i965/gen7: gen7_emit_depthbuffer needs the _NEW_DEPTH dirty bit.
Kenneth Graunke
2011-06-08
1
-1
/
+2
*
i965/gen7: Remove stencil renderbuffer from gen7_depth_format.
Kenneth Graunke
2011-06-08
1
-3
/
+0
*
i965/gen7: Add support for rendering to depthbuffer mipmap levels > 0.
Kenneth Graunke
2011-05-20
1
-2
/
+6
*
i965: Stop caching the combined depth/stencil region in brw_context.c.
Eric Anholt
2011-05-18
1
-5
/
+23
*
i965: Add depth buffer support on Ivybridge.
Kenneth Graunke
2011-05-17
1
-0
/
+122