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authorEric Anholt <[email protected]>2011-05-31 14:27:18 -0700
committerEric Anholt <[email protected]>2011-06-13 15:56:36 -0700
commitb17aab5753a6d14c9e757bedb186963b2dae8823 (patch)
tree360fdd7bc68afeab790e7023590da623df32e19d /src/mesa/drivers/dri/i965/gen7_misc_state.c
parent4fa01d705f0b795a5df30127925ced8e0522631f (diff)
intel: Move the draw_x/draw_y to the renderbuffer where it belongs.
It was originally located in the region because the tracking of depth/color buffers was on the regions, and getting back to the irb would have been tricky. Now, we're keying off of the renderbuffer in more places, which means we can move these fields where they belong. This could fix potential rendering failure with a single texture having multiple images attached to different renderbuffers across shareCtx (as far as I can tell, this was the only failure we could cause, since anything else should trigger intel_render_texture in between, for example a BindFramebuffer). Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_misc_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_misc_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index dd0ccd27193..7544f961da9 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -113,7 +113,7 @@ static void emit_depthbuffer(struct brw_context *brw)
struct intel_region *region = drb->region;
uint32_t tile_x, tile_y, offset;
- offset = intel_region_tile_offsets(region, &tile_x, &tile_y);
+ offset = intel_renderbuffer_tile_offsets(drb, &tile_x, &tile_y);
assert(region->tiling == I915_TILING_Y);