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authorPaul Berry <[email protected]>2012-08-30 10:57:03 -0700
committerPaul Berry <[email protected]>2012-09-12 14:44:13 -0700
commit50dec7fc2d5ba813aaa822596d124098a22db301 (patch)
tree30490f60831d33a16ee861dfcecfc2eea0be133d /src/mesa/drivers/dri/i965/gen7_misc_state.c
parentf04f219906e40a6647a10fd9c1928509fe25fb84 (diff)
intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.
When the blorp engine is performing a blit from one stencil buffer to another, it sets up the surface state for these buffers as Y-tiled, so it needs to be able to force intel_region_get_tile_masks() to return the appropriate masks for a Y-tiled region. NOTE: This is a candidate for stable release branches. Acked-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_misc_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_misc_state.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index a0d24607bc5..9709b8ef8b4 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -69,12 +69,13 @@ static void emit_depthbuffer(struct brw_context *brw)
hiz_mt = depth_mt->hiz_mt;
intel_region_get_tile_masks(depth_mt->region,
- &tile_mask_x, &tile_mask_y);
+ &tile_mask_x, &tile_mask_y, false);
if (hiz_mt) {
uint32_t hiz_tile_mask_x, hiz_tile_mask_y;
intel_region_get_tile_masks(hiz_mt->region,
- &hiz_tile_mask_x, &hiz_tile_mask_y);
+ &hiz_tile_mask_x, &hiz_tile_mask_y,
+ false);
/* Each HiZ row represents 2 rows of pixels */
hiz_tile_mask_y = hiz_tile_mask_y << 1 | 1;