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* st/va: GetConfigAttributes: check profile and entrypoint combinationSatyajit Sahu2020-03-031-2/+6
| | | | | | | | | | Added check if profile is supported or not for the entrypoint in GetConfigAttributes. Signed-off-by: Satyajit Sahu <[email protected]> Acked-by: Leo Liu <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3889>
* intel/isl: Implement D16_UNORM workarounds.Rafael Antognolli2020-03-031-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | GEN:BUG:14010455700 (lineage 1808121037): "To avoid sporadic corruptions “Set 0x7010[9] when Depth Buffer Surface Format is D16_UNORM , surface type is not NULL & 1X_MSAA" Required for fixing ttps://gitlab.freedesktop.org/mesa/mesa/issues/2501. GEN:BUG:1806527549: "Set HIZ_CHICKEN (7018h) bit 13 = 1 when depth buffer is D16_UNORM." This one could fix a GPU hang in some workloads. v2: Implement WA in isl and add another similar WA (Jason). v3: Add flushes before changing chicken registers (Jason) v4: Depth flush and stall + end of pipe sync when changing registers (Jason). Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3801>
* st/va/postproc: reallocate interlaced destination bufferThong Thai2020-03-031-4/+1
| | | | | | | | | | | | When the source buffer is progressive source, re-allocate the destination buffer as progressive if it isn't already - otherwise transcoding will fail. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1418 Signed-off-by: Thong Thai <[email protected]> Reviewed-by: Leo Liu <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4001>
* panfrost: fix transform feedbackLouis-Francis Ratté-Boulianne2020-03-031-0/+7
| | | | | | | | | | | | | | | | | | Fix different use cases for transform feedback by setting: - PIPE_CAP_PACKED_STREAM_OUTPUT=0 - PIPE_CAP_VIEWPORT_TRANSFORM_LOWERED=1 - PIPE_CAP_PSIZ_CLAMPED=1 This is enough for all dEQP xfb-related test cases to run successfully. Signed-off-by: Louis-Francis Ratté-Boulianne <[email protected]> Signed-off-by: Tomeu Vizoso <[email protected]> (Update dEQP expectations) Reviewed-by: Alyssa Rosenzweig <[email protected]> Acked-by: Daniel Stone <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
* gallium: add PIPE_CAP_PSIZ_CLAMPEDLouis-Francis Ratté-Boulianne2020-03-032-0/+2
| | | | | | | | | | | This new capability indicates that the point size has been clamped. This also means that the gl_PointSize has been modified and that its value should be lowered for transform feedback, if needed. Signed-off-by: Louis-Francis Ratté-Boulianne <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Acked-by: Daniel Stone <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
* gallium: add PIPE_CAP_VIEWPORT_TRANSFORM_LOWEREDLouis-Francis Ratté-Boulianne2020-03-032-0/+4
| | | | | | | | | | | This new capability indicates that the nir_lower_viewport_transform pass is enabled. This also means that the gl_Position value is modified and should be lowered for transform feedback, if needed. Signed-off-by: Louis-Francis Ratté-Boulianne <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Acked-by: Daniel Stone <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
* gallium: add PIPE_CAP_PACKED_STREAM_OUTPUTLouis-Francis Ratté-Boulianne2020-03-032-0/+4
| | | | | | | | | | | Setting this cap to 0 (default is 1) should disable packing optimization for stream output (e.g. GL transform feedback captured variables). Signed-off-by: Louis-Francis Ratté-Boulianne <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Acked-by: Daniel Stone <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2433>
* lima: don't disable tiling if there's linear modifier in listVasily Khoruzhick2020-03-031-3/+0
| | | | | | | | | | Instead we should disable it if tiling modifier is not here and we already do that. Reviewed-by: Daniel Stone <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4029>
* ac: rename lds_size_per_cu to lds_size_per_workgroupSamuel Pitoiset2020-03-031-1/+1
| | | | | | | | | It's more accurate. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3975>
* nvc0: enable EXT_texture_shadow_lodIlia Mirkin2020-03-022-4/+10
| | | | | | | | This passes all the CTS tests for this extension. Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
* st/mesa: allow TXB2/TXL2 to work with cube array shadow texturesIlia Mirkin2020-03-021-2/+4
| | | | | | | | | It's a bit asymmetric, but it's such a contrived use-case, and not a lot of drivers will support it. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
* nv50,nvc0: add newly added PIPE_CAP's to listIlia Mirkin2020-03-022-0/+34
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4014>
* intel: fix the gen 12 compute shader scratch IDsPaulo Zanoni2020-03-031-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | This is the same idea as "intel: fix the gen 11 compute shader scratch IDs". The number of EUs on TGL is not the same as ICL, but the MEDIA_VFE_STATE restrictions stay the same, so adapt the code to it. Also, consider the base configuration instead of what we read from the Kernel. According to Mark, this fixes the following piglit tests on TGL: piglit.spec.arb_compute_shader.execution.shared-atomicmax-uint.tglm64 piglit.spec.arb_compute_shader.execution.shared-atomicmax-int.tglm64 piglit.spec.intel_shader_atomic_float_minmax.execution.shared-atomicmax-float.tglm64 v2: s/ICL+/Gen11+/ (Jason). Cc: [email protected] Tested-by: Mark Janes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
* intel: fix the gen 11 compute shader scratch IDsPaulo Zanoni2020-03-031-1/+6
| | | | | | | | | | | | | | | | | | | Scratch space allocation is based on the number of threads in the base configuration, and we only have one base configuration for ICL, with 8 subslices. This fixes an issue with Aztec on Vulkan in a machine with a configuration that's not the base. The issue looks like a regression from b9e93db20896, but it seems things are broken since forever, just not easily reproducible. v2: Reimplement it using the subslices variable. Don't touch TGL. Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
* iris: Wait for the GPU to be idle before invalidating the aux table.Rafael Antognolli2020-03-021-0/+12
| | | | | | | | | An end of pipe sync seems to satisfy this restriction. It takes care of GPU hangs seen in dEQP-GLES31.functional.copy_image.* tests. Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
* iris: Split aux map initialization from invalidation.Rafael Antognolli2020-03-023-9/+34
| | | | | | | | We can write the aux map address only once during the batch initialization, and then only invalidate it once we modify it. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
* gallivm/tessellator: use private functions for min/max to avoid namespace issuesDave Airlie2020-03-031-45/+45
| | | | | | | | | | | | | Different builds are failing because of namespace collisions here. Just fix the MS code to avoid it. Fixes: bd0188f9eab ("gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.") Reviewed-by: Tapani Pälli <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2586 Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4016>
* lima: add RGBA5551 and RGBA4444 formatsVasily Khoruzhick2020-03-024-25/+48
| | | | | | | | | | We also need to set channel_layout in pp_frame reg (previously known as foureight) depending on cbuf format. Reviewed-by: Andreas Baierl <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3972>
* r600/sfn: Don't try to catch exceptions, the driver doesn't throw anyGert Wollny2020-03-021-12/+6
| | | | | | Signed-off-by: Gert Wollny <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
* r600/sfn: Use static_cast when type is already knownGert Wollny2020-03-028-12/+12
| | | | | | | | | | | In all these cases the type was tested before based, so don't use dynamic_casts. Closes #2566 Signed-off-by: Gert Wollny <[email protected]> Tested-by: Mauro Rossi <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
* r600/sfn: Avoid using dynamic_cast to identify typeGert Wollny2020-03-022-17/+34
| | | | | | | | | | v2: Fix typo (maurossi) Related: #2566 Signed-off-by: Gert Wollny <[email protected]> Tested-by: Mauro Rossi <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3974>
* lima: Add etc1 supportAndreas Baierl2020-03-022-9/+9
| | | | | | | | | | | | Layer stride has to be divided by 4. We also have to take care of the array_size when returning the bo_size. Drop the affected tests from the fails list. Reviewed-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Andreas Baierl <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3946>
* st/va: remove unneeded codeThong Thai2020-02-281-22/+12
| | | | | | | | | | No need to explicitly set the 10-bit buffer format as the correct buffer format will be allocated later Signed-off-by: Thong Thai <[email protected]> Reviewed-by: Leo Liu <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3998>
* freedreno: honor FD_MESA_DEBUG=nogrowRob Clark2020-02-281-4/+7
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
* freedreno/a6xx: enable SKIP_IB2_ENABLE properlyRob Clark2020-02-281-0/+8
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
* freedreno/a6xx: don't emit YIELD packetRob Clark2020-02-281-3/+0
| | | | | | | | We don't implement the rest of this.. and it would probably cause bad things when kernel gains support for preemption. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
* freedreno/a6xx: whitespace fixRob Clark2020-02-281-2/+2
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
* freedreno/a6xx: emit LRZ clear in sysmem tooRob Clark2020-02-281-0/+3
| | | | | | | Fixes rendering issues in manhattan with FD_MESA_DEBUG=nogmem Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
* freedreno/a6xx: remove unused paramRob Clark2020-02-281-3/+2
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
* freedreno/ir3: remove from_tgsiRob Clark2020-02-281-5/+6
| | | | | | | | No longer used, other than in ir3 cmdline compiler, where it can be replaced with a local variable. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3989>
* panfrost: LogicOp fixes and non 8-bit format supportIcecream952020-02-283-7/+23
| | | | | | | | | | | | | | With the previous LogicOp commit almost half of the blend modes were broken because the surplus bits were not cleared after an inot. v2: - Remove u8 "fast path" as 8-bit is not well optimised yet - Don't mask for 32-bit formats as that triggers an assert Fixes: 068806c9f6b ("panfrost: LogicOp support") Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
* r600: add missing <array> includeGreg V2020-02-281-0/+1
| | | | | | | | | | | Fixes error with clang/libc++: ../src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h:69:88: error: implicit instantiation of undefined template 'std::__1::array<unsigned char, 3>' bool emit_alu_op3(const nir_alu_instr& instr, EAluOp opcode, std::array<uint8_t, 3> reorder={0,1,2}); Reviewed-by: Gert Wollny <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
* llvmpipe: add support for tessellation shadersDave Airlie2020-02-2812-8/+324
| | | | | | | | | | This adds the hooks between llvmpipe and draw to enable tessellation shaders. It also updates the CI results and docs. Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallium/nir/tgsi: only scan fragment shader inputs for usage_maskDave Airlie2020-02-281-2/+5
| | | | | | | | The scanner doesn't work with tess shaders, but we don't need it for those, in fact only frag shaders need it. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* draw: hook up final bits of tessellationDave Airlie2020-02-289-41/+446
| | | | | | | | | This hooks tessellation into various parts of draw, so the tessellation shaders are used in the correct places as the last shader of the pipeline. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* draw: add main tessellation codeDave Airlie2020-02-289-7/+2119
| | | | | | | | | | | | | | | | This is the bulk of the llvm shader builders and tessellation execution code. TCS uses a coroutine launcher like compute shaders to handle barriers. It executes 4-wide with one input vertex per lane. Tessellation happens before the TES is run. TES is just a 4-wide launcher, one per primitive is executed, with one lane per tessellation coordinate input. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* draw: add JIT context/functions for tess stages.Dave Airlie2020-02-283-0/+313
| | | | | | | | | | | | This adds the initial draw_tess.h with a define needed for the interfaces. TCS input array doesn't need to handle patch inputs so can be smaller. The TCS context has some dummy values to align the textures/images properly. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallivm/nir: add tessellation i/o support.Dave Airlie2020-02-283-11/+174
| | | | | | | | | | This add support for the tessellation i/o callbacks. Tessellation requires another level of indirect indexing, and allows fetches from shader outputs. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallivm/tgsi/swr: add mask vec to the tcs storeDave Airlie2020-02-283-3/+5
| | | | | | | | For the nir paths we want to access the mask vector to only store when the mask allows it. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallivm/nir: align store_var param order with load_varDave Airlie2020-02-283-5/+7
| | | | | | | | This was ugly so align load/store to have mostly the same parameter ordering Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallivm/nir: add support for tess system valuesDave Airlie2020-02-282-1/+24
| | | | | | | hooks up the tessellation specific system values in the NIR paths Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallivm/nir: split out 64-bit splitting codeDave Airlie2020-02-281-11/+20
| | | | | | | This just lets it be reused for tess later. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.Dave Airlie2020-02-286-0/+3419
| | | | | | | | | | | | This adds the same tessellator code that swr uses, swr should move to using this copy, unfortunately that wasn't trivial on my first look. The p_tessellator wrapper wraps it in a form that is a useful interface for draw. Reviewed-by: Roland Scheidegger <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
* gallium/u_vbuf: silence a warning by using unreachableMarek Olšák2020-02-271-1/+1
| | | | | | Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
* nir: fix 5 warningsMarek Olšák2020-02-271-1/+1
| | | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
* gallivm: fix 5 warningsMarek Olšák2020-02-273-4/+5
| | | | | Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
* gallium/u_threaded: convert dividing by index_size to a bit shiftMarek Olšák2020-02-281-1/+1
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
* gallium/u_threaded: fix uploading user indices with start != 0Marek Olšák2020-02-281-1/+2
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
* gallium: pass cso_velems_state into cso_context instead of pipe_vertex_elementMarek Olšák2020-02-2815-117/+130
| | | | | | | This removes one memcpy from the CSO hashing code. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
* gallium/cso_hash: inline struct cso_hash_dataMarek Olšák2020-02-282-32/+28
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-07 19:26:19 +0000