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authorRafael Antognolli <[email protected]>2020-02-25 15:04:08 -0800
committerMarge Bot <[email protected]>2020-03-02 22:28:11 +0000
commita7de6f1321a00316a59effeed93365f6979e6c69 (patch)
tree007ac2c77f21f29a4f271e9a0de779e71b4d17da /src/gallium
parent43dc842cb91c195fe7bb47a7ce324425096bf6f5 (diff)
iris: Split aux map initialization from invalidation.
We can write the aux map address only once during the batch initialization, and then only invalidate it once we modify it. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/iris/iris_blorp.c2
-rw-r--r--src/gallium/drivers/iris/iris_genx_protos.h2
-rw-r--r--src/gallium/drivers/iris/iris_state.c39
3 files changed, 34 insertions, 9 deletions
diff --git a/src/gallium/drivers/iris/iris_blorp.c b/src/gallium/drivers/iris/iris_blorp.c
index ec08c25019d..3162571d8d0 100644
--- a/src/gallium/drivers/iris/iris_blorp.c
+++ b/src/gallium/drivers/iris/iris_blorp.c
@@ -302,7 +302,7 @@ iris_blorp_exec(struct blorp_batch *blorp_batch,
}
#if GEN_GEN >= 12
- genX(emit_aux_map_state)(batch);
+ genX(invalidate_aux_map_state)(batch);
#endif
iris_handle_always_flush_cache(batch);
diff --git a/src/gallium/drivers/iris/iris_genx_protos.h b/src/gallium/drivers/iris/iris_genx_protos.h
index 6d59f936e37..407d77684b3 100644
--- a/src/gallium/drivers/iris/iris_genx_protos.h
+++ b/src/gallium/drivers/iris/iris_genx_protos.h
@@ -37,7 +37,7 @@ void genX(update_pma_fix)(struct iris_context *ice,
struct iris_batch *batch,
bool enable);
-void genX(emit_aux_map_state)(struct iris_batch *batch);
+void genX(invalidate_aux_map_state)(struct iris_batch *batch);
/* iris_blorp.c */
void genX(init_blorp)(struct iris_context *ice);
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 3151c9b62be..eac55039ade 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -880,6 +880,11 @@ iris_alloc_push_constants(struct iris_batch *batch)
}
}
+#if GEN_GEN >= 12
+static void
+init_aux_map_state(struct iris_batch *batch);
+#endif
+
/**
* Upload the initial GPU state for a render context.
*
@@ -996,6 +1001,10 @@ iris_init_render_context(struct iris_batch *batch)
iris_emit_cmd(batch, GENX(3DSTATE_POLY_STIPPLE_OFFSET), foo);
iris_alloc_push_constants(batch);
+
+#if GEN_GEN >= 12
+ init_aux_map_state(batch);
+#endif
}
static void
@@ -1025,6 +1034,11 @@ iris_init_compute_context(struct iris_batch *batch)
if (devinfo->is_geminilake)
init_glk_barrier_mode(batch, GLK_BARRIER_MODE_GPGPU);
#endif
+
+#if GEN_GEN >= 12
+ init_aux_map_state(batch);
+#endif
+
}
struct iris_vertex_buffer_state {
@@ -5097,7 +5111,7 @@ iris_viewport_zmin_zmax(const struct pipe_viewport_state *vp, bool halfz,
#if GEN_GEN >= 12
void
-genX(emit_aux_map_state)(struct iris_batch *batch)
+genX(invalidate_aux_map_state)(struct iris_batch *batch)
{
struct iris_screen *screen = batch->screen;
void *aux_map_ctx = iris_bufmgr_get_aux_map_context(screen->bufmgr);
@@ -5110,13 +5124,24 @@ genX(emit_aux_map_state)(struct iris_batch *batch)
* translation table address, and also to invalidate any previously
* cached translations.
*/
- uint64_t base_addr = gen_aux_map_get_base(aux_map_ctx);
- assert(base_addr != 0 && align64(base_addr, 32 * 1024) == base_addr);
- iris_load_register_imm64(batch, GENX(GFX_AUX_TABLE_BASE_ADDR_num),
- base_addr);
+ iris_load_register_imm32(batch, GENX(GFX_CCS_AUX_INV_num), 1);
batch->last_aux_map_state = aux_map_state_num;
}
}
+
+static void
+init_aux_map_state(struct iris_batch *batch)
+{
+ struct iris_screen *screen = batch->screen;
+ void *aux_map_ctx = iris_bufmgr_get_aux_map_context(screen->bufmgr);
+ if (!aux_map_ctx)
+ return;
+
+ uint64_t base_addr = gen_aux_map_get_base(aux_map_ctx);
+ assert(base_addr != 0 && align64(base_addr, 32 * 1024) == base_addr);
+ iris_load_register_imm64(batch, GENX(GFX_AUX_TABLE_BASE_ADDR_num),
+ base_addr);
+}
#endif
struct push_bos {
@@ -6174,7 +6199,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
genX(emit_hashing_mode)(ice, batch, UINT_MAX, UINT_MAX, 1);
#if GEN_GEN >= 12
- genX(emit_aux_map_state)(batch);
+ genX(invalidate_aux_map_state)(batch);
#endif
}
@@ -6431,7 +6456,7 @@ iris_upload_compute_state(struct iris_context *ice,
iris_use_pinned_bo(batch, ice->state.border_color_pool.bo, false);
#if GEN_GEN >= 12
- genX(emit_aux_map_state)(batch);
+ genX(invalidate_aux_map_state)(batch);
#endif
if (dirty & IRIS_DIRTY_CS) {