aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/gen6_blorp.cpp
Commit message (Expand)AuthorAgeFilesLines
* i965/gen7: Set MOCS L3 cacheability for IVB/BYT (v2)Ville Syrjälä2013-08-211-2/+2
* i965/hsw: Populate MOCS for STATE_BASE_ADDRESS (v2)Ville Syrjälä2013-08-211-1/+6
* i965: Add Gen6 depth stall flushes before disabling depth in BLORP.Kenneth Graunke2013-08-161-0/+3
* i965/hsw: Change L3 MOCS of 3DSTATE_VERTEX_BUFFERSChad Versace2013-07-181-0/+3
* i965: Remove old BSpec reference from BLORP's 3DSTATE_WM/PS packets.Kenneth Graunke2013-07-151-3/+3
* i965: Update workaround flush comments for Gen6 3DSTATE_VS.Kenneth Graunke2013-07-151-1/+1
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-2/+2
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-7/+3
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-091-7/+5
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-091-34/+4
* i965: Replace intel_state.c enums with those from brw_defines.h.Kenneth Graunke2013-07-031-1/+1
* i965/gen7+: Create an enum for keeping track of fast color clear state.Paul Berry2013-06-121-0/+1
* i965: Don't emit PIPELINE_SELECT from BLORP.Kenneth Graunke2013-06-101-19/+0
* i965: Disable pixel statistics in BLORP.Kenneth Graunke2013-05-201-1/+0
* i965: Fix SNB GPU hangs when a blorp batch is the first thing to execute.Eric Anholt2013-05-021-0/+35
* i965: Implement color clears using a simple shader in blorp.Eric Anholt2013-04-301-9/+12
* i965: Don't flush the batch at the end of blorp.Eric Anholt2013-04-301-9/+0
* i965: Change signature of brw_get_depthstencil_tile_masks()Chad Versace2013-04-101-1/+4
* intel: Hook up the WARN_ONCE macro to GL_ARB_debug_output.Eric Anholt2013-03-051-0/+1
* i965: add support for sample mask on Gen6+Chris Forbes2013-03-021-1/+1
* i965: Add WARN_ONCE for depthstencil workarounds we shouldn't be hitting.Eric Anholt2013-03-011-0/+3
* i965/blorp: Support overriding destination alpha to 1.0.Kenneth Graunke2013-02-061-0/+19
* intel: Make intel_region's pitch be bytes instead of pixels.Eric Anholt2013-01-181-5/+3
* i965: Share the draw x/y offset masking code between main/blorp and all gens.Eric Anholt2012-10-161-26/+2
* i965/blorp: Fix narrowing warnings.Paul Berry2012-09-211-3/+3
* intel: Add map_stencil_as_y_tiled to intel_region_get_aligned_offset.Paul Berry2012-09-121-2/+2
* intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.Paul Berry2012-09-121-2/+2
* i965/blorp: Account for offsets when emitting SURFACE_STATE.Paul Berry2012-09-121-3/+10
* i965/blorp: store x and y offsets in brw_blorp_mip_info.Paul Berry2012-09-121-2/+2
* i965/blorp: store surface width/height in brw_blorp_mip_info.Paul Berry2012-09-121-11/+4
* i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces.Paul Berry2012-09-121-1/+5
* i965/msaa: Treat GL_SAMPLES=1 as equivalent to GL_SAMPLES=0.Paul Berry2012-08-011-3/+3
* i965/msaa: Remove TODO comments that are no longer relevant.Paul Berry2012-07-261-1/+0
* i965/msaa: Implement glSampleCoverage.Paul Berry2012-06-261-1/+1
* i965/blorp: Refactor surface format determination.Paul Berry2012-06-071-5/+1
* i965/blorp: Set the dynamic state upper bound.Paul Berry2012-05-251-1/+6
* i965/blorp: Factor gen6_blorp_emit_batch_head into separate functions.Paul Berry2012-05-251-34/+42
* i965/blorp: Use MSDISPMODE_PERSAMPLE rendering when necessaryPaul Berry2012-05-251-1/+4
* i965/gen6+: Add support for fast depth clears.Eric Anholt2012-05-231-3/+4
* i965/gen6: Add CC viewport state setup to blorp code.Eric Anholt2012-05-231-0/+26
* i965: Drop a layer of indirection in doing HiZ resolves.Eric Anholt2012-05-231-21/+0
* i965: Completely annotate the batch bo when aub dumping.Paul Berry2012-05-221-1/+1
* i965/gen6: Initial implementation of MSAA.Paul Berry2012-05-151-25/+19
* i965/gen6+: Add code to perform blits on the render path ("blorp").Paul Berry2012-05-151-17/+380
* i965: split gen{6,7}_blorp_exec functions into manageable chunks.Paul Berry2012-05-151-251/+345
* i965: Parameterize HiZ code to prepare for adding blitting.Paul Berry2012-05-151-87/+59
* i965/hiz: Convert gen{6,7}_hiz.h to gen{6,7}_blorp.hPaul Berry2012-05-101-1/+1
* i965/hiz: Convert gen{6,7}_hiz.c to C++Paul Berry2012-05-101-0/+662