aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_tex_layout.c
Commit message (Expand)AuthorAgeFilesLines
* i965: Drop mt->levels[].width/height.Eric Anholt2014-02-181-3/+2
* mesa: Change many Type A MESA_FORMATs to meet naming standardMark Mueller2014-01-271-3/+3
* mesa: change gl_format to mesa_formatMark Mueller2014-01-271-2/+2
* i965: Don't store qpitch / 4 as mt->qpitch for compressed surfaces.Kenneth Graunke2014-01-251-4/+4
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-3/+3
* i965: Store QPitch in intel_mipmap_tree.Kenneth Graunke2013-12-201-6/+5
* i965: Set vertical alignment unit to 4 on Broadwell.Kenneth Graunke2013-12-021-0/+6
* i965/gen7: Prefer vertical alignment of 4 when possible.Paul Berry2013-11-191-3/+22
* i965: Fix vertical alignment for multisampled buffers.Paul Berry2013-11-151-4/+7
* i965: Fix 3D texture layout by more literally copying from the spec.Eric Anholt2013-10-091-55/+20
* i965: Don't forget the cube map padding on gen5+.Eric Anholt2013-10-091-7/+15
* gen7 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surfaceJordan Justen2013-08-041-9/+1
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-9/+5
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-091-12/+16
* i965: Replace #include "intel_context.h" with brw_context.h.Kenneth Graunke2013-07-091-1/+1
* i965: Move the rest of intel_tex_layout.c into brw_tex_layout.c.Kenneth Graunke2013-07-031-3/+102
* i965: Push intel_get_texture_alignment_unit call into brw_miptree_layoutKenneth Graunke2013-07-031-0/+3
* i965: Declare for-loop counters in the loop in brw_tex_layout.c.Kenneth Graunke2013-07-031-11/+7
* i965: Remove use of GLuint/GLint in brw_tex_layout.c.Kenneth Graunke2013-07-031-19/+19
* i965: Tidy the brw_tex_layout.c copyright and file header comments.Kenneth Graunke2013-07-031-34/+31
* i965: Move i945_texture_layout_2d to brw_tex_layout.cKenneth Graunke2013-07-031-2/+72
* i965: Remove fallthrough for Gen4 cube map layout.Kenneth Graunke2013-07-031-9/+7
* i965: Combine GL_TEXTURE_CUBE_MAP_ARRAY case with the other array cases.Kenneth Graunke2013-07-031-5/+2
* i965: Pull 3D texture layout code out into a helper function.Kenneth Graunke2013-07-031-77/+82
* mesa: Introduce a globally-available minify() macro.Eric Anholt2013-04-211-4/+4
* i965: add support for multisample texturesChris Forbes2013-03-021-0/+1
* intel: Clean up confusion between logical and physical surface dimensions.Paul Berry2013-01-091-10/+10
* i965: Add various plumbing for cubemap arraysChris Forbes2012-12-141-0/+4
* i965/msaa: Add an enum to describe MSAA layout.Paul Berry2012-07-111-2/+8
* i965/msaa: Properly handle sliced layout for Gen7.Paul Berry2012-05-251-2/+8
* i965: fix wrong cube/3D texture layoutYuanhan Liu2012-05-091-2/+3
* intel: Set depth to 6 for cubemapsIan Romanick2012-01-181-3/+3
* i965: Don't minify depth when setting up cube map miptrees on Gen4.Kenneth Graunke2011-12-191-1/+2
* intel: Store miptree alignment units in the miptreeChad Versace2011-11-221-18/+8
* intel: Kill intel_mipmap_level::nr_images [v4]Chad Versace2011-11-221-9/+8
* i965: Add support for GL_EXT_texture_array and GL_MESA_texture_array.Eric Anholt2011-10-031-0/+5
* i965: Refactor out the cube map setup for general texture array setup.Eric Anholt2011-10-031-29/+37
* intel: Remove pointless boolean return value from *_miptree_layout.Kenneth Graunke2011-09-231-4/+2
* intel: Silence several "warning: unused parameter"Ian Romanick2011-09-091-4/+3
* i965: Use proper texture alignment units for cubemaps on Gen5+.Kenneth Graunke2011-09-071-1/+4
* i965/gen5+: Fix incorrect miptree layout for non-power-of-two cubemaps.Kenneth Graunke2011-08-011-1/+1
* intel: Add block alignment for RGTC textures.Eric Anholt2011-06-141-1/+1
* i965/gen7: Fix miptree layout for cube surfaces.Kenneth Graunke2011-05-221-1/+1
* i965: Remove comments about pre-965 hardware.Kenneth Graunke2011-05-221-3/+0
* Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."Eric Anholt2011-01-101-2/+2
* intel: Always allocate miptrees from level 0, not tObj->BaseLevel.Eric Anholt2011-01-051-2/+2
* i965: Fix sampler on sandybridgeZhenyu Wang2010-09-281-1/+1
* i965: Fix cube map layouts on Ironlake.Eric Anholt2010-04-291-62/+18
* intel: Clean up chipset name and gen num for IronlakeZhenyu Wang2010-04-211-1/+1
* intel: Replace mt->pitch with mt->region->pitch.Eric Anholt2010-03-171-14/+9
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-30 04:45:50 +0000