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authorEric Anholt <[email protected]>2014-02-14 13:00:40 -0800
committerEric Anholt <[email protected]>2014-02-18 10:01:45 -0800
commitf128bcc7c293013f4b44e4b661638333de0077c2 (patch)
tree5491b8d902b8a06bf64f2056ee135b4909206849 /src/mesa/drivers/dri/i965/brw_tex_layout.c
parent4e0924c5de5f3964e4ca81f923d877dbb59fad0a (diff)
i965: Drop mt->levels[].width/height.
It often confused people because it was unclear on whether it was the physical or logical, and people needed the other one as well. We can recompute it trivially using the minify() macro, clarifying which value is being used and making getting the other value obvious. v2: Fix a pasteo in intel_blit.c's dst flip. Reviewed-by: Chris Forbes <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_tex_layout.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_layout.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 61a2eba2f54..76044b2fc10 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -197,8 +197,7 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
for (unsigned level = mt->first_level; level <= mt->last_level; level++) {
unsigned img_height;
- intel_miptree_set_level_info(mt, level, x, y, width,
- height, depth);
+ intel_miptree_set_level_info(mt, level, x, y, depth);
img_height = ALIGN(height, mt->align_h);
if (mt->compressed)
@@ -281,7 +280,7 @@ brw_miptree_layout_texture_3d(struct brw_context *brw,
if (mt->target == GL_TEXTURE_CUBE_MAP)
DL = 6;
- intel_miptree_set_level_info(mt, level, 0, 0, WL, HL, DL);
+ intel_miptree_set_level_info(mt, level, 0, 0, DL);
for (unsigned q = 0; q < DL; q++) {
unsigned x = (q % (1 << level)) * wL;