diff options
author | Chad Versace <[email protected]> | 2011-11-15 09:55:40 -0800 |
---|---|---|
committer | Chad Versace <[email protected]> | 2011-11-22 10:35:32 -0800 |
commit | d7b33309fe160212f2eb73f471f3aedcb5d0b5c1 (patch) | |
tree | daf20351a35f1d0d4bc215c5109e44d7d6709e56 /src/mesa/drivers/dri/i965/brw_tex_layout.c | |
parent | 278e77a1192d5251c5b70a555e676f72b446e8e1 (diff) |
intel: Kill intel_mipmap_level::nr_images [v4]
For all texture targets except GL_TEXTURE_CUBE_MAP, the 'nr_images' and
'depth' fields of intel_mipmap_level were identical. In the exceptional
case, nr_images == 6 and depth == 1.
It is simple to determine if a texture is a cube or not, so the presence
of two fields here was not helpful. Worse, it was confusing. When we
eventually implement GL_ARB_texture_cube_map_array, this mess would have
become even more confusing.
This patch removes 'nr_images' and assigns to 'depth' a consistent
meaning: depth is the number of 2D slices at each miplevel. The exact
semantics of depth varies according to the texture target:
- For GL_TEXTURE_CUBE_MAP, depth is 6.
- For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
identical for all miplevels in the texture.
- For GL_TEXTURE_3D, it is the texture's depth at each miplevel. Its
value, like width and height, varies with miplevel.
- For other texture types, depth is 1.
As a consequence, parameters were removed from the following function
signatures:
intel_miptree_set_level_info
Remove 'nr_images'.
i945_miptree_layout
brw_miptree_layout_texture
brw_miptree_layout_texture_array
Remove 'slices'.
v2:
- Replace "It's" with "Its".
- Remove all hunks in intel_fbo.c. The hunks were spurious and sneaked
in during a rebase.
- Remove unneeded hunk in intel_tex_map_image_for_swrast(). It was
a little refactor of the for-loop's upper bound.
v4:
In intel_miptree_get_image_offset(), document the conditions under
which different if-branches are taken.
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_tex_layout.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_tex_layout.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index d77bf4d7cd9..ac6ade60959 100644 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c @@ -41,8 +41,7 @@ static void brw_miptree_layout_texture_array(struct intel_context *intel, - struct intel_mipmap_tree *mt, - int slices) + struct intel_mipmap_tree *mt) { GLuint align_w; GLuint align_h; @@ -58,14 +57,14 @@ brw_miptree_layout_texture_array(struct intel_context *intel, if (mt->compressed) qpitch /= 4; - i945_miptree_layout_2d(mt, slices); + i945_miptree_layout_2d(mt); for (level = mt->first_level; level <= mt->last_level; level++) { - for (q = 0; q < slices; q++) { + for (q = 0; q < mt->depth0; q++) { intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch); } } - mt->total_height = qpitch * slices; + mt->total_height = qpitch * mt->depth0; } void @@ -82,7 +81,7 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt) * pitch of qpitch rows, where qpitch is defined by the equation given * in Volume 1 of the BSpec. */ - brw_miptree_layout_texture_array(intel, mt, 6); + brw_miptree_layout_texture_array(intel, mt); break; } /* FALLTHROUGH */ @@ -117,7 +116,7 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt) GLint y = 0; GLint q, j; - intel_miptree_set_level_info(mt, level, nr_images, + intel_miptree_set_level_info(mt, level, 0, mt->total_height, width, height, depth); @@ -170,11 +169,11 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt) case GL_TEXTURE_2D_ARRAY: case GL_TEXTURE_1D_ARRAY: - brw_miptree_layout_texture_array(intel, mt, mt->depth0); + brw_miptree_layout_texture_array(intel, mt); break; default: - i945_miptree_layout_2d(mt, 1); + i945_miptree_layout_2d(mt); break; } DBG("%s: %dx%dx%d\n", __FUNCTION__, |