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* intel/isl: Add MOCS settings to isl_device.Rafael Antognolli2019-11-122-0/+57
* intel/isl: Allow stencil buffer to support compression on Gen12+Sagar Ghuge2019-10-291-2/+3
* intel: Track stencil aux usage on Gen12+Sagar Ghuge2019-10-292-0/+8
* intel/isl: Support lossless compression with multisamplesSagar Ghuge2019-10-281-5/+1
* intel/isl: Don't reconfigure aux surfaces for MCSSagar Ghuge2019-10-281-0/+3
* intel: Fix and use HIZ_CCS write through modeNanley Chery2019-10-281-0/+6
* isl: Add isl_surf_supports_hiz_ccs_wt()Nanley Chery2019-10-282-0/+18
* intel: Support HIZ_CCS in isl_surf_get_ccs_surfNanley Chery2019-10-282-6/+36
* isl: Reduce assertions during aux surf creationNanley Chery2019-10-281-5/+15
* intel: Enable CCS_E for R24_UNORM_X8_TYPELESS on TGL+Nanley Chery2019-10-281-1/+1
* intel: Use 3DSTATE_DEPTH_BUFFER::ControlSurfaceEnableNanley Chery2019-10-281-1/+1
* intel/isl: Support HIZ_CCS in emit_depth_stencil_hizJason Ekstrand2019-10-281-2/+10
* intel: Use RENDER_SURFACE_STATE::DepthStencilResourceNanley Chery2019-10-281-0/+5
* intel: Update alignment restrictions for HiZ surfaces.Jordan Justen2019-10-281-1/+7
* intel: Enable CCS_E for some formats on Gen12Nanley Chery2019-10-281-29/+44
* isl: Redefine the CCS layout for Gen12Nanley Chery2019-10-285-15/+136
* isl: Add and use isl_tiling_flag_to_enum()Nanley Chery2019-10-282-2/+9
* isl/drm: Map HiZ and CCS tilings to YNanley Chery2019-10-281-2/+2
* intel/isl: Update surf_fill_state for gen12Jason Ekstrand2019-10-281-4/+22
* intel/isl/fill_state: Separate aux_mode handling from aux_surfJason Ekstrand2019-10-281-20/+41
* intel/isl: Add new aux modes available on gen12Jason Ekstrand2019-10-281-1/+33
* isl: Round up some pitches to 512B for Gen12's CCSNanley Chery2019-10-281-6/+14
* isl: Disable CCS_D on Gen12+Nanley Chery2019-10-281-2/+4
* isl/gen12: 64k surface alignmentJordan Justen2019-10-281-0/+4
* intel/isl: Add isl_aux_usage_has_ccsJason Ekstrand2019-10-171-0/+7
* intel/isl: Add R10G10B10_FLOAT_A2_UNORM formatJordan Justen2019-10-173-0/+3
* intel/isl: Add gen12 depth/stencil surface alignmentsJordan Justen2019-10-174-2/+121
* intel/isl: Select Y-tiling for stencil on gen12Jason Ekstrand2019-10-171-4/+7
* intel/genxml: Remove W-tiling on gen12Jason Ekstrand2019-10-171-0/+3
* intel/genxml,isl: Add gen12 stencil buffer changesJordan Justen2019-10-171-1/+22
* intel/genxml,isl: Add gen12 depth buffer changesJordan Justen2019-10-171-1/+1
* intel/genxml,isl: Add gen12 render surface state changesJordan Justen2019-10-171-2/+10
* intel/isl: set vertical surface alignment on null surfacesLionel Landwerlin2019-10-051-0/+13
* intel/isl: set surface array appropriatelyLionel Landwerlin2019-10-051-1/+1
* intel/isl: Set null surface format to R32_UINTLionel Landwerlin2019-10-051-1/+6
* intel/isl/icl: Use halign 8 instead of 4 hw workaroundAnuj Phogat2019-10-031-8/+21
* isl: Drop WaDisableSamplerL2BypassForTextureCompressedFormats on Gen11Kenneth Graunke2019-09-201-1/+1
* intel/isl: Build gen12 using gen11 code pathsJordan Justen2019-08-283-1/+7
* isl: Don't set UnormPathInColorPipe for integer surfaces.Kenneth Graunke2019-08-261-1/+6
* isl: Drop UnormPathInColorPipe for buffer surfaces.Kenneth Graunke2019-08-261-4/+0
* isl: Enable Unorm Path in Color PipeKenneth Graunke2019-08-151-0/+8
* i965/tiled_memcpy: avoid creating bswap32 if it exists as a macro (e.g. on Fr...Greg V2019-08-081-0/+3
* meson: replace libmesa_util with idep_mesautilEric Engestrom2019-08-031-2/+2
* intel/device: rename gen_get_device_infoMark Janes2019-08-011-3/+3
* tree-wide: replace MAYBE_UNUSED with ASSERTEDEric Engestrom2019-07-311-2/+2
* intel: drop incorrect MAYBE_UNUSEDEric Engestrom2019-07-311-1/+1
* isl/formats: R8G8B8_UNORM_SRGB isn't supported on HSWJason Ekstrand2019-07-291-1/+5
* isl: Don't align phys_level0_sa by block dimensionNanley Chery2019-06-272-31/+19
* intel: Add and use helpers for level0 extentNanley Chery2019-06-271-0/+32
* isl: tag unreachable path as suchEric Engestrom2019-06-201-0/+2
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