aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
Commit message (Expand)AuthorAgeFilesLines
* i965: perf: minimize the chances to spread queries across batchbuffersLionel Landwerlin2017-06-271-0/+8
* i965: Separate gen < 8 and gen >= 8 paths explicitly in wrap_mode()Topi Pohjolainen2017-06-271-3/+3
* i915: On Gen <= 3 there are no array texturesIan Romanick2017-06-264-17/+0
* i915: On Gen <= 3 there is no W-tilingIan Romanick2017-06-264-29/+9
* i915: Remove unused fields intel_mipmap_tree::logical_(width|height|depth)0Ian Romanick2017-06-262-11/+0
* i915: Remove unused field intel_mipmap_tree::array_spacing_lod0Ian Romanick2017-06-261-9/+0
* i915: On Gen <= 3 there is no multisamplingIan Romanick2017-06-263-38/+9
* i915: Trivial code reformattingIan Romanick2017-06-261-56/+54
* i915,i965: Don't condition use of GLSL clear on the current APIIan Romanick2017-06-262-7/+2
* drirc: whitelist glthread for a few gamesMarek Olšák2017-06-261-0/+16
* i965/miptree: Rework aux enablingJason Ekstrand2017-06-234-122/+120
* i965: Clamp clear colors to the representable rangeJason Ekstrand2017-06-231-0/+40
* i965: Don't bother with HiZ in renderbuffer_move_to_tempJason Ekstrand2017-06-231-4/+0
* i965/miptree: Rename the non_msrt_mcs functions to _ccsJason Ekstrand2017-06-233-40/+25
* i965/miptree: Delete the layered rendering resolveJason Ekstrand2017-06-231-14/+0
* i965/cnl: Don't write to Cache Mode Register 1 on gen10+Anuj Phogat2017-06-231-2/+4
* drirc: Add glsl_correct_derivatives_after_discard for The Witcher 2Edmondo Tommasina2017-06-231-0/+4
* st/dri: add a drirc workaround for Rocket LeagueMarek Olšák2017-06-232-0/+8
* i965: Convert upload_default_color to genxml.Rafael Antognolli2017-06-221-77/+85
* i965: Remove unused code and delete file.Rafael Antognolli2017-06-222-626/+0
* i965: Convert vs, gs, tcs, tes and cs samplers to genxml.Rafael Antognolli2017-06-223-126/+123
* i965: Convert fs sampler state to use genxml.Rafael Antognolli2017-06-223-23/+540
* i965: Fix -Wunused-variable in gen8_write_pma_stall_bits()Chad Versace2017-06-221-2/+0
* i965/dri: Add intel_screen param to intel_create_winsys_renderbufferChad Versace2017-06-223-11/+17
* i965: Move brw_context format arrays to intel_screenChad Versace2017-06-224-40/+64
* i965: Rename some vague format members of brw_contextChad Versace2017-06-229-28/+28
* i915: Fix gl_Fragcoord interpolationVille Syrjälä2017-06-225-16/+21
* mesa: remove _NEW_BUFFER_OBJECTMarek Olšák2017-06-221-1/+0
* mesa: replace VP/FP/ATIfs _Enabled flags with helper functionsMarek Olšák2017-06-2210-20/+25
* mesa: don't update draw buffer bounds in _mesa_update_stateMarek Olšák2017-06-229-0/+29
* mesa: replace ctx->Polygon._FrontBit with a helper functionMarek Olšák2017-06-229-5/+214
* mesa: replace ctx->VertexProgram._TwoSideEnabled with a helper functionMarek Olšák2017-06-222-3/+4
* mesa: replace _mesa_update_stencil() with helper functionsMarek Olšák2017-06-2217-21/+37
* meta: do the full FBO completeness check in decompress_texture_imageMarek Olšák2017-06-221-0/+5
* i965/gen6: Use isl-based miptree also for stencil rbsPohjolainen, Topi2017-06-211-3/+16
* i965: Remove spurious mutex frobbing around call to intel_miptree_blitIan Romanick2017-06-211-13/+6
* i965/miptree: Move isl_surf_get_(hiz|mcs)_surf out of the assertJason Ekstrand2017-06-211-4/+6
* intel/genxml: Normalize URB Data field in WM_STATE.Rafael Antognolli2017-06-211-1/+1
* intel/genxml: Rename field on WM_STATE to match gen6+.Rafael Antognolli2017-06-211-1/+1
* intel/genxml: Normalize fields on WM_STATE.Rafael Antognolli2017-06-211-2/+2
* i915: Always emit W on gen3Ville Syrjälä2017-06-211-6/+4
* intel: compiler/i965: fix is_broxton checksLionel Landwerlin2017-06-201-1/+1
* i965: Fall back to normal blorp clear instead of meta clearIan Romanick2017-06-203-34/+30
* meta/blit: Silence unused parameter warningIan Romanick2017-06-201-2/+2
* meta: Silence unused parameter warningIan Romanick2017-06-201-2/+2
* i965: Fix incorrect commentIan Romanick2017-06-201-1/+1
* i965: perf: use gen_device_info rather then brw_contextLionel Landwerlin2017-06-191-3/+4
* intel: common: express timestamps units in frequencyLionel Landwerlin2017-06-191-1/+1
* i965: convert MI_REPORT_PERF_COUNT to genxmlLionel Landwerlin2017-06-193-28/+34
* i965: perf: fix codegen with single operand equationLionel Landwerlin2017-06-191-1/+3