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path: root/src/mesa/drivers/dri/i965
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* i965/fs_live_variables: Do liveness analysis bottom-to-topJason Ekstrand2015-06-241-19/+19
* i965: Delete linked GLSL IR when using NIR.Tapani Pälli2015-06-241-1/+4
* i965: Rename intel_emit* to reflect their new location in brw_pipe_controlChris Wilson2015-06-2427-55/+55
* i965: Transplant PIPE_CONTROL routines to brw_pipe_controlChris Wilson2015-06-245-314/+343
* i965: Fix whitespace error in gen8_depth_state.cKenneth Graunke2015-06-231-1/+1
* i965: Don't count NIR instructions for shader-db.Kenneth Graunke2015-06-231-31/+0
* i965/fs: Get rid of an unused variable in emit_barrier()Jason Ekstrand2015-06-231-2/+2
* i965: Remove the brw_context from the visitorsJason Ekstrand2015-06-2320-79/+86
* i965/vec4_vs: Add an explicit use_legacy_snorm_formula flagJason Ekstrand2015-06-233-6/+12
* i965/vec4: Turn some _mesa_problem calls into assertsJason Ekstrand2015-06-231-6/+3
* i965/vs: Pass the current set of clip planes through run() and run_vs()Jason Ekstrand2015-06-237-23/+20
* i965/fs: Add a do_rep_send flag to run_fsJason Ekstrand2015-06-232-5/+6
* i965: Pull calls to get_shader_time_index out of the visitorJason Ekstrand2015-06-2316-76/+79
* i965: Use a single index per shader for shader_time.Jason Ekstrand2015-06-2311-104/+55
* i965: Add compiler options to brw_compilerJason Ekstrand2015-06-236-46/+57
* i965/fs: Plumb compiler debug logging through brw_compilerJason Ekstrand2015-06-233-4/+36
* i965/fs: Do the no16 perf logging directly in fs_visitor::no16()Jason Ekstrand2015-06-231-11/+2
* i965/fs: Make no16 non-variadicJason Ekstrand2015-06-232-11/+5
* i965: Move INTEL_DEBUG variable parsing to screen creation timeJason Ekstrand2015-06-234-10/+11
* i965: Remove the dependance on brw_context from the generatorsJason Ekstrand2015-06-239-11/+17
* i965: Plumb compiler debug logging through a function pointer in brw_compilerJason Ekstrand2015-06-2311-34/+51
* i965: Replace some instances of brw->gen with devinfo->genJason Ekstrand2015-06-232-6/+6
* i965: Initialize backend_shader::mem_ctx in its constructor.Matt Turner2015-06-234-5/+5
* i965: Assert that the GL primitive isn't out of range.Matt Turner2015-06-231-1/+3
* i965/cfg: Assert that cur_do/while/if pointers are non-NULL.Matt Turner2015-06-231-0/+2
* i965/fs: Don't mess up stride for uniform integer multiplication.Matt Turner2015-06-231-4/+16
* i965/gen9: Don't use encrypted MOCSBen Widawsky2015-06-231-2/+2
* i965: Add and fix comments in brw_vue_map.c.Kenneth Graunke2015-06-221-1/+13
* i965: Split VUE map handling out of brw_vs.c into brw_vue_map.c.Kenneth Graunke2015-06-223-102/+137
* i965/gen9: Implement Push Constant Buffer workaroundBen Widawsky2015-06-221-7/+41
* i965/gen8: Use HALIGN_16 for single sample mcs buffersBen Widawsky2015-06-191-1/+1
* i965: Add missing braces around if-statement.Matt Turner2015-06-181-1/+2
* i965/compute: Fix undefined code with right_mask for SIMD32Jordan Justen2015-06-181-1/+1
* i965: Fix textureGrad with cube samplersIago Toral Quiroga2015-06-181-8/+18
* i965: enable ARB_framebuffer_no_attachments for Gen7+Kevin Rogovin2015-06-172-0/+7
* i965: execution of frag-shader when it has atomic bufferKevin Rogovin2015-06-172-0/+7
* i965: Use _mesa_geometric_ functions appropriatelyKevin Rogovin2015-06-1716-34/+70
* i965/gen9: Disable Mip Tail for YF/YS tiled surfacesAnuj Phogat2015-06-162-2/+11
* i965/gen9: Set vertical and horizontal surface alignmentsAnuj Phogat2015-06-161-6/+26
* i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*Anuj Phogat2015-06-161-3/+3
* i965: Rename use_linear_1d_layout() and make it globalAnuj Phogat2015-06-162-5/+9
* i965/gen9: Set tiled resource mode in surface stateAnuj Phogat2015-06-162-0/+27
* i965/vec4: Fix the source register for indexed samplersNeil Roberts2015-06-161-0/+3
* i965: Fix aligning to the block size in intel_miptree_copy_sliceNeil Roberts2015-06-161-2/+4
* i965: Check for miptree pitch alignment before using intel_miptree_map_movntd...Anuj Phogat2015-06-151-1/+3
* i965: Remove break after returnAnuj Phogat2015-06-151-3/+0
* i965/gen8+: Add aux buffer alignment assertionsBen Widawsky2015-06-121-0/+22
* i965/gen9: Set HALIGN_16 for all aux buffersBen Widawsky2015-06-121-3/+19
* i965/gen8: Correct HALIGN for AUX surfacesBen Widawsky2015-06-123-7/+22
* i965: Extract tiling from fast clear decisionBen Widawsky2015-06-122-16/+30
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