aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965
Commit message (Expand)AuthorAgeFilesLines
* i965/gen9: Add a condition for starting pixel in fast copy blitAnuj Phogat2015-09-281-0/+4
* i965: Rename intel_miptree_get_dimensions_for_image()Anuj Phogat2015-09-285-10/+14
* i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLTAnuj Phogat2015-09-281-11/+7
* i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLTAnuj Phogat2015-09-281-2/+7
* i965: Move conversion of {src, dst}_pitch to dwords outside if/elseAnuj Phogat2015-09-281-16/+9
* i965: Delete temporary variable 'src_pitch'Anuj Phogat2015-09-281-5/+1
* i965: Use helper function intel_get_tile_dims() in surface setupAnuj Phogat2015-09-281-2/+12
* i965: Use intel_get_tile_dims() to get tile masksAnuj Phogat2015-09-284-33/+28
* i965: Add a helper function intel_get_tile_dims()Anuj Phogat2015-09-282-22/+64
* i965/fs: Fix hang on IVB and VLV with image format mismatch.Francisco Jerez2015-09-281-4/+38
* i965/gs: Optimize away the EOT write on Gen8+ with static vertex count.Kenneth Graunke2015-09-261-0/+15
* i965/gs: Allow src0 immediates in GS_OPCODE_SET_WRITE_OFFSET.Kenneth Graunke2015-09-262-2/+14
* i965: Implement "Static Vertex Count" geometry shader optimization.Kenneth Graunke2015-09-265-4/+28
* i965: Move GS_THREAD_END mlen calculations out of the generator.Kenneth Graunke2015-09-262-2/+2
* i965: Simplify handling of VUE map changes.Kenneth Graunke2015-09-264-42/+17
* i965/gs: Remove the dependency on the VS VUE map.Kenneth Graunke2015-09-262-11/+14
* i965: Don't re-layout varyings for separate shader programs.Kenneth Graunke2015-09-265-18/+67
* i965/vue: Make assign_vue_map() take an explicit slot.Kenneth Graunke2015-09-261-16/+19
* i965: Initialize unused VUE map slots to BRW_VARYING_SLOT_PAD.Kenneth Graunke2015-09-261-1/+1
* i965: Fix BRW_VARYING_SLOT_PAD handling in the scalar VS backend.Kenneth Graunke2015-09-261-4/+2
* i965: Enable ARB_shader_storage_buffer_object extension for gen7+Samuel Iglesias Gonsalvez2015-09-251-0/+1
* i965/nir/vec4: Implement nir_intrinsic_ssbo_atomic_*Iago Toral Quiroga2015-09-252-0/+79
* i965/nir/fs: Implement nir_intrinsic_ssbo_atomic_*Iago Toral Quiroga2015-09-252-0/+79
* i965/nir/vec4: Implement nir_intrinsic_load_ssboIago Toral Quiroga2015-09-251-0/+54
* i965/nir/fs: Implement nir_intrinsic_load_ssboIago Toral Quiroga2015-09-251-0/+62
* i965/nir/vec4: Implement nir_intrinsic_store_ssboIago Toral Quiroga2015-09-251-0/+148
* i965/nir/fs: Implement nir_intrinsic_store_ssboIago Toral Quiroga2015-09-251-0/+71
* i965/vec4: Import surface message builder functions.Francisco Jerez2015-09-252-0/+273
* i965/vec4: Import helpers to convert vectors into arrays and back.Francisco Jerez2015-09-253-0/+130
* i965/vec4: Introduce VEC4 IR builder.Francisco Jerez2015-09-252-0/+603
* i965/wm: surfaces should have the API buffer size, not the drm buffer sizeSamuel Iglesias Gonsalvez2015-09-251-2/+2
* i965/wm: emit null buffer surfaces when null buffers are attachedSamuel Iglesias Gonsalvez2015-09-251-18/+26
* i965/fs/nir: implement nir_intrinsic_get_buffer_sizeSamuel Iglesias Gonsalvez2015-09-251-0/+24
* i965/fs: Implement FS_OPCODE_GET_BUFFER_SIZESamuel Iglesias Gonsalvez2015-09-255-0/+55
* i965/vec4/nir: implement nir_intrinsic_get_buffer_sizeSamuel Iglesias Gonsalvez2015-09-251-0/+26
* i965/vec4: Implement VS_OPCODE_GET_BUFFER_SIZESamuel Iglesias Gonsalvez2015-09-255-0/+44
* glsl: Add parser/compiler support for unsized array's length()Samuel Iglesias Gonsalvez2015-09-252-0/+10
* i965/fs: Do not split buffer variablesIago Toral Quiroga2015-09-251-0/+1
* i965: handle visiting of ir_var_shader_storage variablesIago Toral Quiroga2015-09-251-2/+3
* i965: Upload Shader Storage Buffer Object surfacesIago Toral Quiroga2015-09-252-13/+57
* i965: Set MaxShaderStorageBuffers for compute shadersIago Toral Quiroga2015-09-251-0/+3
* i965: set ARB_shader_storage_buffer_object related constant valuesSamuel Iglesias Gonsalvez2015-09-251-0/+12
* i965: Implement DriverFlags.NewShaderStorageBufferIago Toral Quiroga2015-09-252-0/+3
* i965: Use 64-byte offset alignment for shader storage buffersIago Toral Quiroga2015-09-251-0/+9
* i965/cs: Implement DispatchComputeIndirect supportJordan Justen2015-09-243-4/+60
* i965/vec4: check swizzle before discarding a uniform on a 3src operandAlejandro Piñeiro2015-09-241-3/+6
* i965: Respect stride and subreg_offset for ATTR registersKristian Høgsberg Kristensen2015-09-241-1/+4
* mesa: rework Driver.CopyImageSubData() and related codeBrian Paul2015-09-241-23/+57
* i965: add ARB_texture_barrier supportIlia Mirkin2015-09-232-0/+10
* i965/gs: Fix extra level of indentation left by the previous commit.Kenneth Graunke2015-09-232-115/+111
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-03 22:00:18 +0000