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path: root/src/mesa/drivers/dri/i965
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* i965: Use rcp in brw_lower_texture_gradients rather than 1.0 / x.Kenneth Graunke2016-01-051-1/+1
* i965/gen9: Modify the conditions to use blitter on skl+Anuj Phogat2016-01-051-3/+9
* i965/gen9: Return false in place of assert in intelEmitCopyBlit()Anuj Phogat2016-01-051-3/+4
* i965/gen9: Remove regions overlap check in fast copy blitAnuj Phogat2016-01-051-5/+0
* i965/gen9: Don't use fast copy blit in case of non power of 2 cppAnuj Phogat2016-01-051-2/+4
* i915/i965: Fix typo in perf_debug messageIan Romanick2016-01-051-1/+1
* i965: quieten compiler warning about out-of-bounds accessIlia Mirkin2016-01-051-0/+1
* i965/wm: use binding size for ubo/ssbo when automatic size is unsetIlia Mirkin2016-01-051-4/+10
* Revert "i965/wm: use proper API buffer size for the surfaces."Ilia Mirkin2016-01-052-9/+4
* i965/wm: use proper API buffer size for the surfaces.Samuel Iglesias Gonsálvez2016-01-042-4/+9
* nir: extract out helper macros for running passesRob Clark2016-01-031-36/+9
* i965: Make TCS precompile use the TES primitive mode when available.Kenneth Graunke2016-01-021-1/+3
* i965: Push most TES inputs in SIMD8 mode.Kenneth Graunke2016-01-021-12/+30
* i965: Use LOAD_PAYLOAD for SIMD8 TES input loads, not MOV.Kenneth Graunke2016-01-021-1/+4
* i965: Move 3-src subnr swizzle handling into the vec4 backend.Kenneth Graunke2016-01-022-6/+18
* i965/gen8: Always use BRW_REGISTER_TYPE_UW for MUL on GEN8+Marta Lofstedt2015-12-302-29/+1
* i965: Reemit vertex state between indirect multi drawsKristian Høgsberg Kristensen2015-12-291-2/+22
* i965: Add support for gl_DrawIDARB and enable extensionKristian Høgsberg Kristensen2015-12-2912-5/+145
* i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARBKristian Høgsberg Kristensen2015-12-2911-37/+88
* i965: Assert that SYSTEM_VALUE_VERTEX_ID gets loweredKristian Høgsberg Kristensen2015-12-291-0/+1
* i965: Enable ARB_tessellation_shader on Gen7-7.5.Kenneth Graunke2015-12-282-3/+3
* i965: Don't set interleave or complete on TCS EOT message.Kenneth Graunke2015-12-285-5/+41
* i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.Kenneth Graunke2015-12-285-1/+93
* i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.Kenneth Graunke2015-12-281-4/+6
* i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.Kenneth Graunke2015-12-281-2/+5
* i965: Port tessellation evaluation shaders to vec4 mode.Kenneth Graunke2015-12-288-2/+365
* i965: Emit a real 3DSTATE_DS on Gen7.Kenneth Graunke2015-12-281-11/+54
* i965: Emit a real 3DSTATE_HS on Gen7.Kenneth Graunke2015-12-281-11/+47
* i965: Add the TCS/TES state upload atoms to the gen7_atoms list.Kenneth Graunke2015-12-283-30/+14
* nir: Get rid of function overloadsJason Ekstrand2015-12-285-47/+48
* i965: Add tr_mode and mip tail information in surface state dumpAnuj Phogat2015-12-231-2/+5
* i965/gen8/cs: Gen8 requires 64 byte alignment for push constant dataJordan Justen2015-12-221-3/+3
* i965: Enable ARB_tessellation_shader on Gen8+.Kenneth Graunke2015-12-221-0/+1
* i965: Handle mix-and-match TCS/TES with separate shader objects.Kenneth Graunke2015-12-228-24/+87
* i965: Defer input lowering for tessellation stages until specialization.Kenneth Graunke2015-12-224-27/+22
* i965: Automatically create a passthrough TCS when needed.Kenneth Graunke2015-12-223-12/+113
* i965: Start program_string_id from 1, not 0.Kenneth Graunke2015-12-221-0/+1
* i965: Create and set a new brw_tcs_prog_data::outputs_written field.Kenneth Graunke2015-12-222-6/+14
* i965: Upload HS push constants whenever default tess. levels change.Kenneth Graunke2015-12-223-0/+5
* i965: Only call _mesa_load_state_parameters if prog exists.Kenneth Graunke2015-12-221-1/+2
* i965: Switch TCS gl_program/gl_shader_program checks over to TES.Kenneth Graunke2015-12-223-4/+5
* i965: Remove unnecessary brw->tess_ctrl_program assertions.Kenneth Graunke2015-12-225-6/+1
* i965: Consolidate BRW_NEW_TESS_{CTRL,EVAL}_PROGRAM flags.Kenneth Graunke2015-12-2214-47/+37
* i965: Only call brw_upload_tcs/tes_prog when using tessellation.Kenneth Graunke2015-12-223-24/+13
* i965: Ensure FS execution in presence of atomic buffersIago Toral Quiroga2015-12-222-5/+6
* mesa: Add a _mesa_active_fragment_shader_has_side_effects helperIago Toral Quiroga2015-12-222-7/+2
* i965: Implement gl_PatchVerticesIn by baking it into brw_tcs_prog_key.Kenneth Graunke2015-12-223-1/+12
* i965: Add tessellation control shaders.Kenneth Graunke2015-12-2219-2/+1195
* i965: Add tessellation evaluation shadersKenneth Graunke2015-12-2213-3/+627
* i965: Only apply CS stall workaround pre-SKLBen Widawsky2015-12-211-2/+4
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