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authorAnuj Phogat <[email protected]>2015-12-23 11:14:20 -0800
committerAnuj Phogat <[email protected]>2015-12-23 13:20:45 -0800
commit52865efc411f6dfa8bdca6ad52a71ef79f4acaba (patch)
tree6ff540e182c1d82367517137964085841c21e0d5 /src/mesa/drivers/dri/i965
parent8326eb13f2b13390a75bc0af2635d7d0385001e8 (diff)
i965: Add tr_mode and mip tail information in surface state dump
Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_dump.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c
index 3d3a6cf943a..46667884125 100644
--- a/src/mesa/drivers/dri/i965/brw_state_dump.c
+++ b/src/mesa/drivers/dri/i965/brw_state_dump.c
@@ -319,10 +319,13 @@ dump_gen8_surface_state(struct brw_context *brw, uint32_t offset, int index)
GET_FIELD(surf[4], GEN7_SURFACE_MIN_ARRAY_ELEMENT),
GET_FIELD(surf[4], GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT) + 1,
1 << GET_BITS(surf[4], 5, 3));
- batch_out(brw, name, offset, 5, "x,y offset: %d,%d, min LOD: %d\n",
+ batch_out(brw, name, offset, 5, "x,y offset: %d,%d, min LOD: %d,"
+ " tr_mode (gen9+): %d, mip tail (gen9+): %d\n",
GET_FIELD(surf[5], BRW_SURFACE_X_OFFSET),
GET_FIELD(surf[5], BRW_SURFACE_Y_OFFSET),
- GET_FIELD(surf[5], GEN7_SURFACE_MIN_LOD));
+ GET_FIELD(surf[5], GEN7_SURFACE_MIN_LOD),
+ GET_FIELD(surf[5], GEN9_SURFACE_TRMODE),
+ GET_FIELD(surf[5], GEN9_SURFACE_MIP_TAIL_START_LOD));
batch_out(brw, name, offset, 6, "AUX pitch: %d qpitch: %d\n",
GET_FIELD(surf[6], GEN8_SURFACE_AUX_QPITCH) << 2,
GET_FIELD(surf[6], GEN8_SURFACE_AUX_PITCH) << 2);