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path: root/src/mesa/drivers/dri/i965/gen8_depth_state.c
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* i965: Add and use a single miptree aux_buf fieldNanley Chery2018-04-241-3/+3
* i965: Make use of brw_load_register_imm32() helper functionAnuj Phogat2017-11-141-5/+3
* i965: drop brw->gen in favor of devinfo->genLionel Landwerlin2017-08-301-3/+6
* i965: Reduce passing 2x32b of reloc_domains to 2 bitsChris Wilson2017-08-041-6/+3
* i965/miptree: Clean-up unusedTopi Pohjolainen2017-07-221-6/+2
* i965: Represent depth surfaces with islTopi Pohjolainen2017-07-201-1/+2
* i965/miptree: Represent w-tiled stencil surfaces with islTopi Pohjolainen2017-07-201-3/+7
* i965/miptree: Switch to isl_surf::row_pitchTopi Pohjolainen2017-07-201-2/+2
* i965/miptree: Take interleaving into account in stencil pitchTopi Pohjolainen2017-07-201-15/+1
* i965: Fix -Wunused-variable in gen8_write_pma_stall_bits()Chad Versace2017-06-221-2/+0
* mesa: replace _mesa_update_stencil() with helper functionsMarek Olšák2017-06-221-3/+3
* i965/miptree/gen7+: Use isl for hiz layoutsTopi Pohjolainen2017-06-191-3/+3
* i965: Delete intel_resolve_mapJason Ekstrand2017-06-071-1/+0
* i965: Use BLORP for all HiZ opsJason Ekstrand2017-06-071-144/+0
* i965: Move the post-HiZ-clear flush/stall to intel_hiz_execJason Ekstrand2017-06-071-16/+0
* i965/miptree: Store fast clear colors in an isl_color_valueJason Ekstrand2017-06-071-1/+1
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-131-1/+1
* i965: split EU defines to brw_eu_defines.hEmil Velikov2017-03-131-0/+1
* i965: Fix fast depth clears for surfaces with a dimension of 16384.Kenneth Graunke2017-01-251-0/+12
* i965: Make depth clear flushing more explicitTopi Pohjolainen2017-01-181-0/+16
* i965: Disable depth writes when depth test is GL_EQUAL.Kenneth Graunke2016-11-181-2/+2
* i965/miptree: Create a hiz mcs typeBen Widawsky2016-11-081-3/+3
* i965: Fix alpha-to-coverage and alpha test enabled checksAnuj Phogat2016-11-071-4/+6
* i965: Eliminate brw->wm.prog_data pointer.Kenneth Graunke2016-10-051-10/+9
* i965: Move the hiz_op enum to blorpJason Ekstrand2016-08-291-6/+6
* i965: Assert that a depth_mt exists when using HiZ.Matt Turner2016-05-251-0/+1
* i965: Make all atoms to track BRW_NEW_BLORP by defaultKenneth Graunke2016-04-231-1/+2
* i965/gen8: Expose pma stall emissionTopi Pohjolainen2016-04-211-4/+4
* mesa: replace gl_context->Multisample._Enabled with _mesa_is_multisample_enab...Bas Nieuwenhuizen2016-03-241-1/+2
* i965/gen7-8: Set up early depth/stencil control appropriately for image load/...Francisco Jerez2015-08-111-3/+3
* i965: Move pipecontrol workaround bo to brw_pipe_controlChris Wilson2015-07-081-1/+1
* i965: Drop brw->depthstencil.stencil_offset from gen8_depth_state.c.Kenneth Graunke2015-06-251-5/+2
* i965: Rename intel_emit* to reflect their new location in brw_pipe_controlChris Wilson2015-06-241-1/+1
* i965: Fix whitespace error in gen8_depth_state.cKenneth Graunke2015-06-231-1/+1
* i965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)Ben Widawsky2015-05-271-0/+10
* i965/state: Don't use brw->state.dirty.mesaJordan Justen2015-03-311-1/+1
* i965/skl: Don't use the PMA depth stall workaroundBen Widawsky2015-03-271-1/+6
* i965/gen8: Don't rely directly on the hiz miptree structureJordan Justen2015-03-091-3/+3
* i965/hiz: Start to separate miptree out from hiz buffersJordan Justen2015-03-091-3/+3
* i965: Rename some PIPE_CONTROL flagsBen Widawsky2015-03-021-1/+1
* i965/skl: Implement WaDisable1DDepthStencilNeil Roberts2015-02-101-0/+12
* i965: Move PSCDEPTH calculations from draw time to compile time.Kenneth Graunke2014-12-041-8/+4
* i965: Move BRW_NEW_*_PROG_DATA flags to .brw (not .cache).Kenneth Graunke2014-12-021-2/+2
* i965: Rename CACHE_NEW_*_PROG to BRW_NEW_*_PROG_DATA.Kenneth Graunke2014-12-021-3/+3
* i965: Use brw_wm_prog_data::uses_kill, not gl_fragment_program::UsesKillKenneth Graunke2014-11-271-2/+2
* i965: Implement the PMA stall fix.Kenneth Graunke2014-11-041-0/+170
* i965/skl: Use new MOCS for SKLKristian Høgsberg2014-11-031-4/+6
* Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404Jordan Justen2014-09-041-1/+1
* i965: Create a macro for setting a dirty bit.Paul Berry2014-09-011-1/+1
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-1/+1
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