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authorBen Widawsky <[email protected]>2015-02-26 23:01:33 -0800
committerBen Widawsky <[email protected]>2015-03-02 19:28:43 -0800
commit37c2687645bf44515dbd1bc1c066b02889ca46c4 (patch)
tree2b51591fb4219be3aca3b9911b9ffe8e4bcedb34 /src/mesa/drivers/dri/i965/gen8_depth_state.c
parente214000f258ae564e64d839cccee9418526f226b (diff)
i965: Rename some PIPE_CONTROL flags
I'm not really sure of the origins of the existing flag names. Modern docs have some slightly different names. Having the correct names makes it easier to determine if existing PIPE_CONTROL flag settings are correct, as well as making adding new PIPE_CONTROLs easier. This originally came up while I was trying to implement workarounds and spotted some things called, "flush" which should have been called "invalidate." Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_depth_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen8_depth_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index b4eb6e143a5..5c56d518eb8 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -340,7 +340,7 @@ write_pma_stall_bits(struct brw_context *brw, uint32_t pma_stall_bits)
* Flush is also necessary.
*/
const uint32_t render_cache_flush =
- ctx->Stencil._WriteEnabled ? PIPE_CONTROL_WRITE_FLUSH : 0;
+ ctx->Stencil._WriteEnabled ? PIPE_CONTROL_RENDER_TARGET_FLUSH : 0;
brw_emit_pipe_control_flush(brw,
PIPE_CONTROL_CS_STALL |
PIPE_CONTROL_DEPTH_CACHE_FLUSH |