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path: root/src/mesa/drivers/dri/i965/brw_tex_layout.c
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* i965/msaa: Add an enum to describe MSAA layout.Paul Berry2012-07-111-2/+8
* i965/msaa: Properly handle sliced layout for Gen7.Paul Berry2012-05-251-2/+8
* i965: fix wrong cube/3D texture layoutYuanhan Liu2012-05-091-2/+3
* intel: Set depth to 6 for cubemapsIan Romanick2012-01-181-3/+3
* i965: Don't minify depth when setting up cube map miptrees on Gen4.Kenneth Graunke2011-12-191-1/+2
* intel: Store miptree alignment units in the miptreeChad Versace2011-11-221-18/+8
* intel: Kill intel_mipmap_level::nr_images [v4]Chad Versace2011-11-221-9/+8
* i965: Add support for GL_EXT_texture_array and GL_MESA_texture_array.Eric Anholt2011-10-031-0/+5
* i965: Refactor out the cube map setup for general texture array setup.Eric Anholt2011-10-031-29/+37
* intel: Remove pointless boolean return value from *_miptree_layout.Kenneth Graunke2011-09-231-4/+2
* intel: Silence several "warning: unused parameter"Ian Romanick2011-09-091-4/+3
* i965: Use proper texture alignment units for cubemaps on Gen5+.Kenneth Graunke2011-09-071-1/+4
* i965/gen5+: Fix incorrect miptree layout for non-power-of-two cubemaps.Kenneth Graunke2011-08-011-1/+1
* intel: Add block alignment for RGTC textures.Eric Anholt2011-06-141-1/+1
* i965/gen7: Fix miptree layout for cube surfaces.Kenneth Graunke2011-05-221-1/+1
* i965: Remove comments about pre-965 hardware.Kenneth Graunke2011-05-221-3/+0
* Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."Eric Anholt2011-01-101-2/+2
* intel: Always allocate miptrees from level 0, not tObj->BaseLevel.Eric Anholt2011-01-051-2/+2
* i965: Fix sampler on sandybridgeZhenyu Wang2010-09-281-1/+1
* i965: Fix cube map layouts on Ironlake.Eric Anholt2010-04-291-62/+18
* intel: Clean up chipset name and gen num for IronlakeZhenyu Wang2010-04-211-1/+1
* intel: Replace mt->pitch with mt->region->pitch.Eric Anholt2010-03-171-14/+9
* i965: Remove unnecessary headers.Vinson Lee2010-01-301-1/+0
* intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt2009-12-221-1/+1
* intel: Keep track of x,y offsets in miptrees and use them for blitting.Eric Anholt2009-10-231-3/+4
* intel: Fix failure to commit -a --amend before last push.Eric Anholt2009-08-191-1/+1
* intel: Align cubemap texture height to its padding requirements.Eric Anholt2009-08-191-0/+10
* i965: fix cube map on IGDNGXiang, Haihao2009-08-131-5/+8
* i965: add support for new chipsetsXiang, Haihao2009-07-131-1/+73
* i965: Fix up texture layout for small things with wide pitches (tiled)Eric Anholt2009-06-171-1/+1
* intel: Add support for tiled textures.Eric Anholt2009-06-041-4/+5
* i965: fix whitespace in brw_tex_layout.cEric Anholt2009-05-211-32/+31
* mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...Brian Paul2008-09-181-1/+1
* [INTEL] Fix 965 to use new centralized mipmap pitch functionKeith Packard2007-12-181-3/+3
* [965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt2007-12-071-0/+1
* [965] Convert DBG macro to use FILE_DEBUG_FLAG like i915.Eric Anholt2007-11-191-0/+2
* [965] Replace various alignment code with a shared ALIGN() macro.Eric Anholt2007-10-041-3/+1
* i965: align width/height for volume textureXiang, Haihao2007-08-171-13/+33
* Share code to lay out >= 945 style 2D mipmaps between i915tex and i965 drivers.Michel Dänzer2006-12-141-52/+3
* Support ARB_texture_rectangle.Keith Whitwell2006-09-201-2/+5
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+162
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