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path: root/src/mesa/drivers/dri/i965/brw_state.h
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* i965/gen10+: Enable object level preemption.Rafael Antognolli2018-12-141-1/+2
* i965: Add flag_state param to brw_search_cacheJordan Justen2018-07-091-5/+3
* i965: Add brw_stage_cache_id to map gl stages to brw cache_idsJordan Justen2018-07-091-0/+2
* i965: Use ISL for emitting depth/stencil/hiz state on gen6+Jason Ekstrand2018-05-081-3/+0
* i965: Use the brw_depthbuffer atom on all gensJason Ekstrand2018-05-081-1/+0
* i965: Reuse batch decoder infrastructure rather than open coding it.Kenneth Graunke2018-05-021-1/+0
* i965/icl: Define and use icl mocs settingsAnuj Phogat2018-02-151-0/+6
* i965/icl: Build and use gen11 functions for genxml state-upload and blorpAnuj Phogat2018-02-151-0/+1
* i965: move disk cache from brw_context to intel_screenTapani Pälli2018-01-301-1/+1
* i965: Upload invariant state once at the start of the batch on Gen4-5.Kenneth Graunke2017-11-161-1/+0
* i965: Fold ABO state upload code into the SSBO/UBO state upload code.Kenneth Graunke2017-11-151-6/+0
* i965: Switch over to fully external-or-not MOCS schemeJason Ekstrand2017-11-131-0/+3
* i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is falseJordan Justen2017-10-311-0/+1
* i965: Add shader cache support for computeJordan Justen2017-10-311-1/+2
* i965: add initial implementation of on disk shader cacheTimothy Arceri2017-10-311-0/+5
* i965: Store image_param in brw_context instead of prog_dataJason Ekstrand2017-10-121-1/+1
* intel: Rewrite the world of push/pull paramsJason Ekstrand2017-10-121-1/+1
* i965: Get rid of gen7_cs_state.cJason Ekstrand2017-10-121-0/+5
* i965: Add a helper for populating constant buffersJason Ekstrand2017-10-121-0/+7
* i965: Move brw_upload_pull_constants to gen6_constant_state.cJason Ekstrand2017-10-121-1/+1
* i965: Make brw_update_texture_surface static.Kenneth Graunke2017-10-111-4/+0
* i965: Disentangle batch and state buffer flushing.Kenneth Graunke2017-09-141-0/+1
* i965: Move brw_state_batch code to intel_batchbuffer.cKenneth Graunke2017-09-141-3/+1
* i965: Drop the BRW_BATCH_STRUCT macro.Kenneth Graunke2017-09-011-3/+0
* i965: Inline brw_update_renderbuffer_surfaces().Kenneth Graunke2017-08-231-5/+0
* i965: Devirtualize update_renderbuffer_surface.Kenneth Graunke2017-08-231-4/+0
* i965: Make brw_update_renderbuffer_surface static.Kenneth Graunke2017-08-231-5/+0
* i965: Use ISL for emitting null surface states.Kenneth Graunke2017-08-191-8/+0
* i965: Reduce passing 2x32b of reloc_domains to 2 bitsChris Wilson2017-08-041-1/+1
* i965: Convert WM_STATE to genxml on gen4-5.Rafael Antognolli2017-07-181-1/+0
* i965: Convert GS_STATE to genxml.Rafael Antognolli2017-07-131-1/+0
* i965: Remove upload_gs_state_for_tf.Rafael Antognolli2017-07-131-2/+0
* i965: Convert CC state on gen4-5 to genxml.Rafael Antognolli2017-07-131-1/+0
* i965: Convert vs, gs, tcs, tes and cs samplers to genxml.Rafael Antognolli2017-06-221-5/+0
* i965: Convert fs sampler state to use genxml.Rafael Antognolli2017-06-221-1/+0
* i965: Convert SF_STATE to genxml.Rafael Antognolli2017-06-161-1/+0
* i965/cnl: Start using CNL MOCS definesAnuj Phogat2017-06-091-0/+8
* i965/cnl: Add gen10 specific function declarationsAnuj Phogat2017-06-091-0/+1
* i965/miptree: Store fast clear colors in an isl_color_valueJason Ekstrand2017-06-071-0/+3
* i965: Fix return type of translate_tex_format()Chad Versace2017-06-011-3/+3
* i965: Fix return type of brw_isl_format_for_mesa_format() [v2]Chad Versace2017-06-011-2/+1
* i965: Port CC_VIEWPORT to genxml.Kenneth Graunke2017-05-291-1/+0
* i965: Port 3DSTATE_VF_TOPOLOGY on gen8+ to genxml.Rafael Antognolli2017-05-111-1/+0
* i965: Port 3DSTATE_INDEX_BUFFER to genxml.Rafael Antognolli2017-05-111-1/+0
* i965: Port brw_cs_state tracked state to genxml.Rafael Antognolli2017-05-111-1/+0
* i965: Port Gen4-5 VS_STATE to genxml.Kenneth Graunke2017-05-111-1/+0
* i965: Move MOCS macros to brw_state.h.Rafael Antognolli2017-05-071-0/+42
* i965: Port 3DSTATE_VF to genxml and simplify the implementation.Kenneth Graunke2017-05-061-1/+0
* i965: Port gen4+ state emitting code to genxml.Rafael Antognolli2017-05-031-5/+0
* i965: Port gen6+ 3DSTATE_CC_STATE_POINTERS state to genxml.Rafael Antognolli2017-05-031-1/+0
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