index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
mesa
/
drivers
/
dri
/
i965
/
brw_pipe_control.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
i965,anv: Set the CS stall bit on the ISP disable PIPE_CONTROL
Jason Ekstrand
2018-05-09
1
-1
/
+2
*
i965: require pixel scoreboard stall prior to ISP disable
Lionel Landwerlin
2018-05-09
1
-1
/
+8
*
i965: Drop unused alignment parameter from brw_bo_alloc().
Kenneth Graunke
2018-03-27
1
-1
/
+1
*
i965: Drop PIPE_CONTROL_NO_WRITE from various calls.
Kenneth Graunke
2018-03-27
1
-1
/
+1
*
i965: Shorten the name of the workaround BO.
Kenneth Graunke
2018-03-01
1
-3
/
+1
*
i965/gen10: Use CS Stall instead of WriteImmediate.
cros-mesa-18.1_pre1-r4-vanilla
chadv/cros-mesa-18.1_pre1-r4-vanilla
Rafael Antognolli
2018-01-26
1
-6
/
+4
*
i965/gen10: Ignore push constant packets during context restore.
Rafael Antognolli
2018-01-26
1
-0
/
+49
*
i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.
Kenneth Graunke
2017-11-17
1
-1
/
+5
*
i965: Implement another VF cache invalidate workaround on Gen8+.
Kenneth Graunke
2017-11-16
1
-8
/
+33
*
i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DW
Anuj Phogat
2017-11-14
1
-2
/
+5
*
i965: Program DWord Length in MI_FLUSH_DW
Anuj Phogat
2017-11-14
1
-1
/
+1
*
i965/gen10: Use the correct form of | for the RCPFE workaround
Jason Ekstrand
2017-11-10
1
-2
/
+2
*
i965/gen10: Implement WaForceRCPFEHangWorkaround
Anuj Phogat
2017-11-03
1
-0
/
+23
*
i965: Add PIPE_CONTRTOL_DATA_CACHE flush to brw_emit_mi_flush().
Kenneth Graunke
2017-08-30
1
-0
/
+1
*
i965: drop brw->is_haswell in favor of devinfo->is_haswell
Lionel Landwerlin
2017-08-30
1
-2
/
+2
*
i965: drop brw->gen in favor of devinfo->gen
Lionel Landwerlin
2017-08-30
1
-15
/
+29
*
i965: Reduce passing 2x32b of reloc_domains to 2 bits
Chris Wilson
2017-08-04
1
-8
/
+4
*
i965: Do an end-of-pipe sync after flushes
Jason Ekstrand
2017-06-14
1
-3
/
+3
*
i965: Add an end-of-pipe sync helper
Topi Pohjolainen
2017-06-14
1
-1
/
+99
*
i965: Unify the two emit_pipe_control functions
Jason Ekstrand
2017-06-14
1
-73
/
+64
*
i965: Take a uint64_t immediate in emit_pipe_control_write
Jason Ekstrand
2017-06-14
1
-12
/
+10
*
i965/drm: Rename drm_bacon_bo to brw_bo.
Kenneth Graunke
2017-04-10
1
-5
/
+5
*
i965/drm: Use our internal libdrm (drm_bacon) rather than the real one.
Kenneth Graunke
2017-04-10
1
-3
/
+3
*
i965/gen6+: Invalidate constant cache on brw_emit_mi_flush().
Francisco Jerez
2016-12-14
1
-0
/
+1
*
i965: Remove useless (harmful) assertion
Ben Widawsky
2016-09-28
1
-1
/
+1
*
intel: s/brw_device_info/gen_device_info/
Jason Ekstrand
2016-09-03
1
-1
/
+1
*
i965: Roll intel_reg.h into brw_defines.h
Jason Ekstrand
2016-08-19
1
-1
/
+1
*
i965: Fix remaining flush vs invalidate race conditions in brw_emit_pipe_cont...
Francisco Jerez
2016-07-07
1
-0
/
+18
*
i965: Emit SKL VF cache invalidation W/A from brw_emit_pipe_control_flush.
Francisco Jerez
2016-07-07
1
-9
/
+10
*
i965: Emit SNB write cache flush W/A from brw_emit_pipe_control_flush.
Francisco Jerez
2016-07-07
1
-10
/
+11
*
i965: Fix brw_render_cache_set_check_flush's PIPE_CONTROLs.
Kenneth Graunke
2016-03-28
1
-2
/
+0
*
i965: Rename define for the PIPE_CONTROL DC flush bit.
Francisco Jerez
2016-02-08
1
-1
/
+1
*
i965: Only apply CS stall workaround pre-SKL
Ben Widawsky
2015-12-21
1
-2
/
+4
*
i965/gen8: Don't add workaround bits to PIPE_CONTROL stalls if DC flush is set.
Francisco Jerez
2015-12-09
1
-1
/
+3
*
i965/gen8+: Skip depth stalls on state change
Ben Widawsky
2015-09-08
1
-0
/
+8
*
i965: Move pipecontrol workaround bo to brw_pipe_control
Chris Wilson
2015-07-08
1
-6
/
+34
*
i965: Rename intel_emit* to reflect their new location in brw_pipe_control
Chris Wilson
2015-06-24
1
-4
/
+4
*
i965: Transplant PIPE_CONTROL routines to brw_pipe_control
Chris Wilson
2015-06-24
1
-0
/
+331