diff options
| author | Lionel Landwerlin <[email protected]> | 2017-08-30 09:19:47 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <[email protected]> | 2017-08-30 17:59:17 +0100 |
| commit | 97e90113c662b73b0b2d37385df516dbaa937d19 (patch) | |
| tree | affc6d1d3919237961aa24da0c82af40a78b0bc8 /src/mesa/drivers/dri/i965/brw_pipe_control.c | |
| parent | d324197de9e9c4c3c18a2ee8c0508462dc8bcdf5 (diff) | |
i965: drop brw->is_haswell in favor of devinfo->is_haswell
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_pipe_control.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_pipe_control.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c index a341408fe06..063b814b9a3 100644 --- a/src/mesa/drivers/dri/i965/brw_pipe_control.c +++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c @@ -73,7 +73,7 @@ gen7_cs_stall_every_four_pipe_controls(struct brw_context *brw, uint32_t flags) { const struct gen_device_info *devinfo = &brw->screen->devinfo; - if (devinfo->gen == 7 && !brw->is_haswell) { + if (devinfo->gen == 7 && !devinfo->is_haswell) { if (flags & PIPE_CONTROL_CS_STALL) { /* If we're doing a CS stall, reset the counter and carry on. */ brw->pipe_controls_since_last_cs_stall = 0; @@ -383,7 +383,7 @@ brw_emit_end_of_pipe_sync(struct brw_context *brw, uint32_t flags) PIPE_CONTROL_WRITE_IMMEDIATE, brw->workaround_bo, 0, 0); - if (brw->is_haswell) { + if (devinfo->is_haswell) { /* Haswell needs addition work-arounds: * * From Haswell PRM, volume 2, part 1, "End-of-Pipe Synchronization": |