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path: root/src/mesa/drivers/dri/i965/brw_nir.c
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* i965: Make uniform offsets be in terms of bytesJason Ekstrand2015-12-071-3/+27
* i965/vec4: Get rid of the nir_inputs arrayJason Ekstrand2015-12-031-16/+12
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-1/+0
* util: move brw_env_var_as_boolean() to utilRob Clark2015-11-241-1/+3
* i965: Use NIR for lowering texture swizzleJason Ekstrand2015-11-231-0/+10
* i965: Use nir_lower_tex for texture coordinate loweringJason Ekstrand2015-11-231-0/+27
* nir/lower_tex: Report progressJason Ekstrand2015-11-231-1/+1
* i965: Move postprocess_nir to codegen timeJason Ekstrand2015-11-231-1/+0
* i965/nir: Split shader optimization and lowering into three stagesJason Ekstrand2015-11-231-38/+95
* nir: s/nir_type_unsigned/nir_type_uintJason Ekstrand2015-11-231-2/+2
* nir: add nir_var_all enumRob Clark2015-11-191-1/+1
* i965/nir: Add hooks for testing nir_shader_cloneJason Ekstrand2015-11-181-9/+26
* i965/nir: Validate that NIR passes call nir_metadata_preserve().Kenneth Graunke2015-11-181-3/+7
* i965/nir: Add OPT() and OPT_V() macros for invoking NIR passes.Kenneth Graunke2015-11-181-72/+59
* nir/nir_opt_peephole_ffma: Move this lowering pass to the i965 driverEduardo Lima Mitev2015-11-101-1/+1
* i965: Fix scalar VS float[] and vec2[] output arrays.Kenneth Graunke2015-11-051-1/+2
* i965: Add scalar GS input lowering code.Kenneth Graunke2015-11-031-5/+39
* glsl: keep track of intra-stage indices for atomicsTimothy Arceri2015-10-271-2/+4
* i965/nir: Switch on shader stage in nir_lower_outputs().Kenneth Graunke2015-10-171-5/+21
* i965/fs: Ignore compute shaders in brw_nir_lower_inputsJordan Justen2015-10-141-0/+4
* i965/fs: Simplify FS in brw_nir_lower_inputs to only support scalar modeJordan Justen2015-10-141-1/+2
* i965/vs: Simplify fs_visitor's ATTR file.Kenneth Graunke2015-10-121-0/+40
* i965/vs: Map scalar VS input locations properly; avoid tons of MOVs.Kenneth Graunke2015-10-101-1/+22
* nir: Introduce new nir_intrinsic_load_per_vertex_input intrinsics.Kenneth Graunke2015-10-041-2/+11
* i965: Use nir_foreach_variableJason Ekstrand2015-10-021-1/+1
* i965/nir: Remove the prog parameter from brw_nir_lower_inputsJason Ekstrand2015-10-021-4/+2
* nir/glsl: Take a gl_shader_program and a stage rather than a gl_shaderJason Ekstrand2015-10-021-2/+1
* i965/nir: Refactor input/output lowering setup into helpers.Kenneth Graunke2015-10-011-20/+26
* nir: Allow nir_lower_io() to only lower one type of variable.Kenneth Graunke2015-10-011-2/+2
* i965/gs: Use new NIR intrinsics.Kenneth Graunke2015-09-231-0/+5
* nir/lower_tex: support projector lowering per sampler typeRob Clark2015-09-181-1/+4
* nir: rename nir_lower_tex_projectorRob Clark2015-09-181-1/+1
* i965/vec4: Use nir_move_vec_src_uses_to_destJason Ekstrand2015-09-171-0/+3
* i965/vec4_nir: Use partial SSA form rather than full non-SSAJason Ekstrand2015-09-151-1/+1
* i965/nir: enable the dead control flow optimizationConnor Abbott2015-09-011-0/+2
* i965/nir: Make use of nir_opt_undefBoyan Ding2015-08-271-0/+2
* nir: Use nir_shader::stage rather than passing it around.Kenneth Graunke2015-08-251-1/+1
* i965/fs: Rework uniform handlingJason Ekstrand2015-08-251-4/+3
* nir: Pass a type_size() function pointer into nir_lower_io().Kenneth Graunke2015-08-251-6/+10
* i965/nir: Do not scalarize phis in non-scalar setupsIago Toral Quiroga2015-08-031-2/+6
* i965/nir: Add new utility method brw_glsl_base_type_for_nir_type()Eduardo Lima Mitev2015-08-031-0/+21
* i965/nir/vec4: Lower "vecN" instructions and mark them unreachableAntia Puentes2015-08-031-0/+5
* i965/nir: Disable alu_to_scalar pass on non-scalar shadersAlejandro Piñeiro2015-08-031-6/+10
* i965/nir/vec4: Implement store_output intrinsicEduardo Lima Mitev2015-08-031-1/+4
* i965/nir: Move brw_type_for_nir_type() to brw_nir to allow reuseEduardo Lima Mitev2015-08-031-0/+18
* i965/nir/vec4: Implement load_const intrinsicEduardo Lima Mitev2015-08-031-1/+1
* i965/nir: Dot not assign direct uniform locations first for vec4-based shadersIago Toral Quiroga2015-08-031-4/+10
* nir/nir_lower_io: Add vec4 supportIago Toral Quiroga2015-08-031-6/+8
* i965/nir: Pass a is_scalar boolean to brw_create_nir()Eduardo Lima Mitev2015-08-031-1/+2
* i965/fs: use SSA values directlyConnor Abbott2015-06-301-1/+1
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