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path: root/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
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* i965/fs: Calculate delta_x and delta_y together.Matt Turner2015-04-211-4/+4
* i965/fs: Ensure delta_x/y are even-aligned registers on Gen6.Matt Turner2015-04-211-2/+2
* i965: Remove useless reg_offset >= 0 tests.Matt Turner2015-04-111-1/+0
* i965/fs: Remove dependency of fs_inst on the visitor class.Francisco Jerez2015-02-101-1/+1
* i965: Factor out virtual GRF allocation to a separate object.Francisco Jerez2015-02-101-25/+25
* i965/fs: Use inst->eot rather than opcodes in register allocation.Kenneth Graunke2015-02-051-11/+10
* i965/fs: Delete is_last_send(); just check inst->eot.Kenneth Graunke2015-02-051-14/+1
* i965: Add SIMD8 URB write low-level IR instructionKristian Høgsberg2014-12-101-1/+15
* i965/fs: Clean up some whitespace in reg_allocate.Matt Turner2014-12-011-2/+2
* i965/fs: Don't set dependency hints on instructions with spilled destinationsJason Ekstrand2014-10-271-0/+8
* i965/fs: Make scratch write instructions use the correct execution sizeJason Ekstrand2014-10-271-1/+1
* i965/fs: Use correct spill offsetsJason Ekstrand2014-10-271-6/+5
* i965/fs: Don't [un]spill multiple registers at a time in SIMD8 modeJason Ekstrand2014-10-271-2/+4
* i965/fs: Compute q-values for register allocation manuallyJason Ekstrand2014-10-241-2/+56
* i965/fs: Don't interfere with too many base registersJason Ekstrand2014-10-241-2/+2
* i965/fs: Properly precolor payload registers on GEN5 in SIMD16Jason Ekstrand2014-10-241-1/+10
* i965/fs: Add another use of MAX_VGRF_SIZEJason Ekstrand2014-10-241-1/+1
* i965/fs: Use the correct regs_written on unspill instructionsJason Ekstrand2014-10-141-0/+1
* i965/fs: Use the correct base_mrf for spilling pairs in SIMD8Jason Ekstrand2014-10-021-3/+4
* i965/fs: Add a MAX_GRF_SIZE define and use it various placesJason Ekstrand2014-10-021-1/+1
* i965/fs: Use the GRF for FB writes on gen >= 7Jason Ekstrand2014-09-301-1/+33
* i965/fs: Determine partial writes based on the destination widthJason Ekstrand2014-09-301-3/+1
* i965/fs_reg: Allocate double the number of vgrfs in SIMD16 modeJason Ekstrand2014-09-301-61/+132
* i965/fs: Use offset a lot more placesJason Ekstrand2014-09-301-2/+2
* i965: Add and use functions to get next/prev blocks.Matt Turner2014-09-241-2/+2
* i965: Make instruction lists local to the bblocks.Matt Turner2014-09-241-3/+3
* i965/fs: Make count_to_loop_end() use basic blocks.Matt Turner2014-09-241-15/+16
* i965/fs: Don't use instruction list after calculating the cfg.Matt Turner2014-09-241-5/+5
* i965: Remove now unneeded calls to calculate_cfg().Matt Turner2014-09-241-2/+0
* i965: Remove cfg-invalidating parameter from invalidate_live_intervals.Matt Turner2014-09-241-1/+1
* i965: Mark delta_x/y as BAD_FILE if remapped away completely.Kenneth Graunke2014-09-161-0/+1
* i965/fs: Preserve CFG in register allocation.Matt Turner2014-08-221-8/+12
* ra: cleanup the public APIConnor Abbott2014-08-131-1/+1
* i965/fs: set virtual_grf_count in assign_regs()Connor Abbott2014-08-101-0/+4
* i965/fs: don't read from uninitialized memory while assigning registersConnor Abbott2014-08-101-6/+6
* i965: Use typed foreach_in_list instead of foreach_list.Matt Turner2014-07-011-18/+6
* i965/fs: Loop from 0 to inst->sources, not 0 to 3.Matt Turner2014-06-011-3/+3
* i965: Give dump_instructions() a filename argument.Matt Turner2014-06-011-1/+1
* i965/fs: Move payload register info from brw_wm_compile to fs_visitor.Kenneth Graunke2014-05-181-3/+3
* i965/fs: Move c->last_scratch into fs_visitor.Kenneth Graunke2014-05-181-2/+2
* i965: Allocate register sets at screen creation, not context creation.Kenneth Graunke2014-03-181-23/+25
* i965/fs: Remove fs_reg::smear.Francisco Jerez2014-02-121-2/+2
* i965/fs: Add support for specifying register horizontal strides.Francisco Jerez2014-02-121-2/+2
* i965/fs: Add support for sub-register byte offsets to the FS back-end IR.Francisco Jerez2014-02-121-11/+9
* i965/fs: Add and use MAX_SAMPLER_MESSAGE_SIZE definition.Matt Turner2014-01-211-1/+2
* i965: Replace 8-wide and 16-wide with SIMD8 and SIMD16.Eric Anholt2014-01-171-4/+4
* i965/fs: Try a different pre-scheduling heuristic if the first spills.Eric Anholt2013-11-121-7/+3
* i965/fs: Use the gen7 scratch read opcode when possible.Eric Anholt2013-10-301-3/+12
* i965: Merge together opcodes for SHADER_OPCODE_GEN4_SCRATCH_READ/WRITEEric Anholt2013-10-301-5/+7
* i965/fs: Fix register unspills from a reg_offset.Eric Anholt2013-10-301-3/+3
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