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path: root/src/mesa/drivers/dri/i965/brw_eu_emit.c
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* i965: the offset of any branch/jump instruction is in unit of 64bits on IGDNGXiang, Haihao2009-07-151-4/+17
* i965: add support for new chipsetsXiang, Haihao2009-07-131-56/+211
* i965: fixes for JMPIXiang, Haihao2009-07-021-0/+4
* i965: use BRW_MAX_MRFBrian Paul2009-06-301-1/+1
* i965: fix fetching constants from constant buffer in glsl pathRoland Scheidegger2009-06-261-11/+16
* i915: fix broken indirect constant buffer readsBrian Paul2009-04-171-44/+3
* i965: implement relative addressing for VS constant buffer readsBrian Paul2009-04-161-4/+55
* i965: fix VS constant buffer readsBrian Paul2009-04-141-22/+25
* i965: checkpoint commit: VS constant buffersBrian Paul2009-04-141-3/+63
* i965: new SURF_INDEX_ macrosBrian Paul2009-04-091-1/+1
* i965: set BRW_MASK_DISABLE flag in "send" instruction in brw_dp_READ_4()Brian Paul2009-04-081-1/+2
* i965: s/GL_FALSE/BRW_COMPRESSION_NONE/Brian Paul2009-04-031-1/+1
* i965: fix response length param in brw_dp_READ_4()Brian Paul2009-04-031-1/+1
* i965: added new brw_dp_READ_4() functionBrian Paul2009-04-031-0/+50
* i965: new and updated commentsBrian Paul2009-04-031-17/+29
* i965: comments for brw_SAMPLE()Brian Paul2009-04-031-1/+5
* i965: add some register number assertionsBrian Paul2009-03-131-0/+8
* i965: minor clean-upsBrian Paul2009-02-131-27/+26
* i965: implement OPCODE_TRUNC (round toward zero) on vertex path.Brian Paul2009-01-051-0/+1
* i965: Merge GM45 into the G4X chipset define.Eric Anholt2008-11-021-8/+8
* Fix for 58dc8b7: dest regions must not use HorzStride 0 in ExecSize 1Keith Packard2008-11-011-0/+4
* i965: support destination horiz strides in align1 access mode.Gary Wong2008-10-311-2/+2
* i965: force thread switch after IF/ELSE/ENDIF. partial fix for #16882.Xiang, Haihao2008-08-291-0/+5
* i965: mask control for BREAK/CONT/DO/WHILE. partial fix fox #16882Xiang, Haihao2008-08-291-4/+4
* i965: official name for GM45 chipsetXiang, Haihao2008-07-081-8/+8
* i965: new integrated graphics chipset supportXiang, Haihao2008-01-291-10/+21
* i965: The jump instruction count is addedXiang, Haihao2007-11-271-1/+1
* support continue, fix conditionalZou Nan hai2007-09-291-0/+14
* support branch and loop in pixel shaderZou Nan hai2007-06-211-5/+23
* Initial 965 GLSL supportZou Nan hai2007-04-121-1/+1
* i965: Avoid branch instructions while in single program flow mode.Eric Anholt2007-01-061-55/+100
* fix a couple of cases where a message reg is used as an instruction source.Keith Whitwell2006-09-011-0/+4
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+999
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