| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | i965: Add missing state dependency of sf_unit on _NEW_BUFFERS. | Eric Anholt | 2009-07-16 | 1 | -2/+4 |
| * | i965: the offset of any branch/jump instruction is in unit of 64bits on IGDNG | Xiang, Haihao | 2009-07-15 | 2 | -6/+24 |
| * | i965: add support for new chipsets | Xiang, Haihao | 2009-07-13 | 27 | -130/+762 |
| * | i965: Remove BRW_NEW_INPUT_VARYING | Eric Anholt | 2009-07-07 | 3 | -10/+1 |
| * | i965: fixes for JMPI | Xiang, Haihao | 2009-07-02 | 3 | -10/+14 |
| * | i965: Increase G4X default VS URB allocation to actually allow 32 threads. | Eric Anholt | 2009-06-30 | 1 | -3/+14 |
| * | i965: first attempt at handling URB overflow when there's too many vs outputs | Brian Paul | 2009-06-30 | 2 | -4/+49 |
| * | i965: use BRW_MAX_MRF | Brian Paul | 2009-06-30 | 1 | -1/+1 |
| * | i965: use BRW_MAX_GRF, BRW_MAX_MRF | Brian Paul | 2009-06-30 | 1 | -2/+3 |
| * | i965: move BRW_MAX_GRF, define BRW_MAX_MRF | Brian Paul | 2009-06-30 | 2 | -6/+8 |
| * | i965: defined BRW_MAX_MRF | Brian Paul | 2009-06-30 | 1 | -0/+3 |
| * | i965: comments and a new assertion | Brian Paul | 2009-06-30 | 1 | -2/+4 |
| * | intel: Move note_unlock() implementation to the one place it's needed. | Eric Anholt | 2009-06-29 | 2 | -9/+2 |
| * | i965: fix fetching constants from constant buffer in glsl path | Roland Scheidegger | 2009-06-26 | 4 | -17/+16 |
| * | i965: Set the max index buffer address correctly according to the docs. | Eric Anholt | 2009-06-23 | 1 | -1/+1 |
| * | i965: Don't set a reserved bit in MI_FLUSH. | Eric Anholt | 2009-06-23 | 1 | -1/+1 |
| * | i965: Fix packed depth/stencil textures to be Y-tiled as well. | Eric Anholt | 2009-06-23 | 1 | -0/+2 |
| * | intel: Also get the DRI2 front buffer when doing front buffer reading. | Eric Anholt | 2009-06-19 | 1 | -0/+1 |
| * | intel: Update Mesa state before span setup in glReadPixels. | Eric Anholt | 2009-06-19 | 1 | -0/+1 |
| * | i965: initial code for loops in vertex programs | Brian Paul | 2009-06-19 | 1 | -2/+38 |
| * | i965: asst clean-ups, etc in brw_vs_emit() | Brian Paul | 2009-06-19 | 1 | -11/+10 |
| * | i965: asst clean-ups, var renaming in brw_wm_emit_glsl() | Brian Paul | 2009-06-19 | 1 | -21/+23 |
| * | i965: Add decode for the G4X x,y offset in surface state. | Eric Anholt | 2009-06-17 | 1 | -0/+2 |
| * | i965: Fix up texture layout for small things with wide pitches (tiled) | Eric Anholt | 2009-06-17 | 1 | -1/+1 |
| * | i965: Fall back or appropriately adjust offsets of drawing to tiled regions. | Eric Anholt | 2009-06-17 | 3 | -3/+54 |
| * | Merge branch 'mesa_7_5_branch' | Brian Paul | 2009-06-16 | 5 | -20/+54 |
| |\ |
|
| | * | i965: fix bugs in projective texture coordinates | Brian Paul | 2009-06-16 | 5 | -20/+54 |
| * | | i965: handle OPCODE_SWZ in the glsl path | Roland Scheidegger | 2009-06-16 | 1 | -0/+1 |
| * | | i965: interpolate colors with perspective correction by default | Brian Paul | 2009-06-12 | 6 | -13/+38 |
| * | | intel: Add support for tiled textures. | Eric Anholt | 2009-06-04 | 1 | -4/+5 |
| * | | i965: Support OPCODE_TRUNC in the brw_wm_fp.c code. | Eric Anholt | 2009-06-02 | 3 | -1/+18 |
| * | | i965: fix whitespace in brw_tex_layout.c | Eric Anholt | 2009-05-21 | 1 | -32/+31 |
| * | | i956: Make state dependency of SF on drawbuffer bounds match Mesa's. | Eric Anholt | 2009-05-21 | 1 | -2/+5 |
| * | | i965: rename var: s/tmp/vs_inputs/ | Brian Paul | 2009-05-21 | 1 | -8/+8 |
| * | | i965: Fix varying payload reg assignment for the non-GLSL-instructions path. | Eric Anholt | 2009-05-14 | 1 | -8/+10 |
| * | | i965: Fix register allocation of GLSL fp inputs. | Eric Anholt | 2009-05-14 | 4 | -13/+27 |
| * | | i965: fix 1D texture borders with GL_CLAMP_TO_BORDER | Robert Ellison | 2009-05-14 | 1 | -0/+10 |
| * | | i965: enable additional code in emit_fb_write() | Brian Paul | 2009-05-12 | 1 | -11/+10 |
| * | | i965: increase BRW_EU_MAX_INSN | Brian Paul | 2009-05-12 | 1 | -1/+1 |
| * | | i965: comment | Brian Paul | 2009-05-12 | 1 | -0/+4 |
| * | | i965: handle extended swizzle terms (0,1) in get_src_reg() | Brian Paul | 2009-05-11 | 1 | -0/+8 |
| * | | i965: improve debug logging | Robert Ellison | 2009-05-08 | 1 | -0/+6 |
| * | | i965: fix segfault on low memory conditions | Robert Ellison | 2009-05-08 | 1 | -0/+7 |
| * | | intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps. | Eric Anholt | 2009-05-08 | 2 | -0/+2 |
| * | | i965: const qualifiers | Brian Paul | 2009-05-08 | 1 | -2/+2 |
| * | | i965: don't use GRF regs 126,127 for WM programs | Brian Paul | 2009-05-08 | 2 | -5/+28 |
| * | | i965: relAddr local var (to make debug/test a little easier) | Brian Paul | 2009-05-07 | 1 | -5/+6 |
| * | | i965: Remove bad constant buffer constant-reg-already-loaded optimization. | Eric Anholt | 2009-05-06 | 1 | -13/+11 |
| * | | i965: Remove the forced lack of caching for renderbuffer surface state. | Eric Anholt | 2009-05-06 | 1 | -11/+8 |
| * | | i965: Remove _NEW_PROGRAM from brw_wm_surfaces setup dependencies. | Eric Anholt | 2009-05-06 | 1 | -2/+1 |
