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path: root/src/mesa/drivers/dri/i965/brw_eu_emit.c
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* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
* i965: Warning fixEric Anholt2014-01-061-2/+0
* i965: Add support for Broadwell's new register types.Kenneth Graunke2013-12-201-1/+9
* i965: Add BRW_REGISTER_TYPE_DF.Kenneth Graunke2013-12-201-0/+3
* i965: Abstract BRW_REGISTER_TYPE_* into an enum with unique values.Kenneth Graunke2013-12-201-4/+53
* i965: Don't use GL types in files shared with intel-gpu-tools.Kenneth Graunke2013-12-051-86/+86
* i965: Drop trailing whitespace from files shared with intel-gpu-tools.Kenneth Graunke2013-12-051-17/+17
* i965/fs: Use the gen7 scratch read opcode when possible.Eric Anholt2013-10-301-0/+42
* i965: Simplify the shader time code by using atomic counter helpers.Francisco Jerez2013-10-291-21/+4
* i965/gen7: Implement code generation for untyped surface read instructions.Francisco Jerez2013-10-291-0/+56
* i965/gen7: Implement code generation for untyped atomic instructions.Francisco Jerez2013-10-291-0/+62
* i965/fs: Convert gen7 to using GRFs for texture messages.Eric Anholt2013-10-101-1/+2
* i965: make BRW_COMPRESSION_2NDHALF valid for brw_SAMPLEChia-I Wu2013-10-091-1/+16
* i965: Generate code for ir_binop_carry and ir_binop_borrow.Matt Turner2013-10-071-0/+2
* i965: Fix writemask != 0 assertions on Sandybridge.Kenneth Graunke2013-09-191-2/+4
* i965/gen7: Add the ability to send URB_WRITE_OWORD messages.Paul Berry2013-09-111-1/+6
* i965/gen7: Allow URB_WRITE channel masks to be used.Paul Berry2013-09-111-1/+1
* i965: Add an assertion that writemask != NULL for non-ARFs.Kenneth Graunke2013-09-101-0/+2
* i965: Remove never used RSR and RSL opcodes.Matt Turner2013-09-051-2/+0
* i965: Allow C++ type safety in the use of enum brw_urb_write_flags.Paul Berry2013-08-261-2/+2
* i965/gs: Add a flag allowing URB write messages to use a per-slot offset.Paul Berry2013-08-231-2/+2
* i965: Combine 4 boolean args of brw_urb_WRITE into a flags bitfield.Paul Berry2013-08-231-20/+12
* i965: Cite the Ivybridge PRM for why the fake MRF range is what it is.Kenneth Graunke2013-07-151-1/+1
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-108/+97
* i965: Move intel_context::is_<platform> flags to brw_context.Kenneth Graunke2013-07-091-3/+4
* i965: Remove broken source type assertions from brw_alu3().Kenneth Graunke2013-06-261-14/+5
* i965: Add back strict type assertions for MAD and LRP.Kenneth Graunke2013-06-261-2/+16
* i965: Add support for emitting and disassembling bit instructions.Matt Turner2013-05-061-0/+7
* i965/gen7: Set src/dst types for 3-src instructions.Matt Turner2013-05-061-4/+36
* i965: Apply CMP NULL {Switch} work-around to other Gen7s.Matt Turner2013-04-221-1/+4
* Revert "i965: Check reg.nr for BRW_ARF_NULL instead of reg.file."Matt Turner2013-04-181-1/+1
* i965: Check reg.nr for BRW_ARF_NULL instead of reg.file.Matt Turner2013-04-171-1/+1
* i965: Implement work-around for CMP with null dest on Haswell.Matt Turner2013-04-171-0/+12
* i965/fs: Switch shader_time writes to using GRFs.Eric Anholt2013-03-281-3/+3
* i965/gen7: Use WE_all mode when enabling channel masks for URB write.Paul Berry2013-03-241-0/+1
* i965: Fix INTEL_DEBUG=shader_time for Haswell.Kenneth Graunke2013-03-141-4/+11
* i965: Add support for emitting the LRP instruction.Kenneth Graunke2013-02-281-0/+1
* i965/gen7: Relax restrictions on fake MRFsMatt Turner2013-02-281-2/+4
* i965: Remove writemask support from brw_SAMPLE().Eric Anholt2013-02-131-105/+18
* i965: Quote the PRM on a HorzStride subtletyChad Versace2013-01-241-1/+4
* i965: Add opcodes for F32TO16 and F16TO32Chad Versace2013-01-241-0/+2
* i965: Add break statement at end of BRW_OPCODE_CONTINUE case.Vinson Lee2013-01-021-0/+1
* i965: Also consider HALTs a potential block end.Eric Anholt2012-12-141-0/+1
* i965: Jump to the end of the next outer conditional block on ENDIFs.Kenneth Graunke2012-12-141-0/+7
* i965/fs: Improve performance of shaders that start out with a discard.Eric Anholt2012-12-111-7/+46
* i965: Add a debug flag for counting cycles spent in each compiled shader.Eric Anholt2012-12-051-2/+54
* i965: Add a header_present flag for setting up dp read messages.Eric Anholt2012-12-041-1/+4
* i965/gen7: Add some safety checks for send messages from GRFs.Eric Anholt2012-12-041-0/+15
* i965: Fix assertion in brw_alu3.Vinson Lee2012-11-071-1/+1
* i965: Remove VS constant buffer read support from brw_eu_emit.c.Kenneth Graunke2012-11-011-110/+0
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