diff options
| author | Chad Versace <[email protected]> | 2013-01-09 11:40:29 -0800 |
|---|---|---|
| committer | Chad Versace <[email protected]> | 2013-01-24 21:24:11 -0800 |
| commit | 7093558b311b223004845d0a422eb88bed15b418 (patch) | |
| tree | 4374ce5185d86abb37be4796061ee1c0591cc56f /src/mesa/drivers/dri/i965/brw_eu_emit.c | |
| parent | 7e21910f233a8ff6e2c4adaee6b4edd2f70b6c68 (diff) | |
i965: Quote the PRM on a HorzStride subtlety
Reviewed-by: Ian Romanick <[email protected]>
Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu_emit.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index fecbff15d65..b34754a9cfc 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -126,7 +126,10 @@ brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, else { insn->bits1.da16.dest_subreg_nr = dest.subnr / 16; insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask; - /* even ignored in da16, still need to set as '01' */ + /* From the Ivybridge PRM, Vol 4, Part 3, Section 5.2.4.1: + * Although Dst.HorzStride is a don't care for Align16, HW needs + * this to be programmed as "01". + */ insn->bits1.da16.dest_horiz_stride = 1; } } |