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path: root/src/intel/compiler/brw_fs_generator.cpp
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* intel/compiler: fix ddy for half-float in BroadwellIago Toral Quiroga2019-04-181-2/+15
* intel/compiler: fix ddx and ddy for 16-bit floatIago Toral Quiroga2019-04-181-19/+18
* i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9Plamena Manolova2019-03-141-0/+1
* intel/eu: Add an EOT parameter to send_indirect_[split]_messageJason Ekstrand2019-02-251-5/+6
* intel/fs: Implement extended strides greater than 4 for IR source regions.Francisco Jerez2019-02-211-3/+10
* intel/fs: Silence a compiler warningJason Ekstrand2019-02-141-2/+1
* intel/fs: Support SENDS in SHADER_OPCODE_SENDJason Ekstrand2019-01-291-8/+15
* intel/fs: Use SHADER_OPCODE_SEND for varying UBO pulls on gen7+Jason Ekstrand2019-01-291-73/+0
* intel/fs: Use SHADER_OPCODE_SEND for texturing on gen7+Jason Ekstrand2019-01-291-136/+26
* intel/fs: Use SHADER_OPCODE_SEND for surface messagesJason Ekstrand2019-01-291-62/+0
* intel/fs: Add a generic SEND opcodeJason Ekstrand2019-01-291-1/+34
* i965: Drop mark_surface_used mechanism.Kenneth Graunke2019-01-131-11/+0
* intel/compiler: Split 64-bit MOV-indirects if neededMatt Turner2019-01-091-1/+2
* intel/fs: Remove FS_OPCODE_UNPACK_HALF_2x16_SPLIT opcodes.Francisco Jerez2019-01-091-34/+0
* intel/fs: Implement quad swizzles on ICL+.Francisco Jerez2019-01-091-15/+67
* intel/compiler: Change src1 reg type to unsigned doublewordSagar Ghuge2018-10-231-2/+2
* intel: Use TXS for image_size when we have a typed surfaceJason Ekstrand2018-08-291-4/+19
* intel/compiler: Implement untyped atomic float min, max, and compare-swap dat...Ian Romanick2018-08-221-0/+7
* intel/fs: Initialize mlen for gen7 varying pull constant load messages.Francisco Jerez2018-07-091-6/+4
* intel/eu: Use descriptor constructors for dataport read messages.Francisco Jerez2018-07-091-16/+16
* intel/eu: Use descriptor constructors for sampler messages.Francisco Jerez2018-07-091-40/+32
* intel/eu: Provide desc immediate argument up front to brw_send_indirect_messa...Francisco Jerez2018-07-091-3/+3
* intel/fs: Get rid of MOV_DISPATCH_TO_FLAGSJason Ekstrand2018-06-281-28/+0
* intel/fs: Disable opt_sampler_eot() in 32-wide dispatch.Francisco Jerez2018-06-281-0/+5
* intel/fs: Emit LINE+MAC for LINTERP with unaligned coordinatesJason Ekstrand2018-06-281-9/+54
* intel/fs: Rework INTERPOLATE_AT_PER_SLOT_OFFSETFrancisco Jerez2018-06-281-3/+5
* intel/fs: Add the group to the flag subreg number on SNB and olderJason Ekstrand2018-06-281-1/+7
* intel/fs: Fix FB write message control codegen for SIMD32.Francisco Jerez2018-06-281-18/+34
* intel/fs: Fix codegen of FS_OPCODE_SET_SAMPLE_ID for SIMD32.Francisco Jerez2018-06-281-11/+13
* intel/fs: Remove program key argument from generator.Francisco Jerez2018-06-281-2/+1
* intel/fs: Set up FB write message headers in the visitorJason Ekstrand2018-06-281-66/+0
* intel/fs: Pull FB write implied headers from src[0]Jason Ekstrand2018-06-281-9/+6
* intel/eu: Add some brw_get_default_ helpersJason Ekstrand2018-06-041-2/+2
* i965: Add ARB_fragment_shader_interlock support.Plamena Manolova2018-06-011-1/+6
* intel/fs: Add explicit last_rt flag to fb writes orthogonal to eot.Francisco Jerez2018-05-291-5/+1
* intel/fs: Replace the CINTERP opcode with a simple MOVFrancisco Jerez2018-05-291-3/+0
* intel/fs: Use groups for SIMD16 LINTERP on gen11+Jason Ekstrand2018-05-291-4/+5
* intel/fs: Assert that the gen4-6 plane restrictions are followedJason Ekstrand2018-05-291-2/+8
* intel/compiler: Silence unused parameter warnings in generate_foo methodsIan Romanick2018-04-241-4/+4
* i965/fs: Add infrastructure for generating CSEL instructions.Kenneth Graunke2018-03-081-0/+6
* intel/fs: Add support for subgroup quad operationsJason Ekstrand2018-03-071-0/+20
* intel/fs: Add a couple of simple helper opcodesJason Ekstrand2018-03-071-0/+47
* i965/fs: Add support for nir_intrinsic_shuffleJason Ekstrand2018-03-071-0/+104
* intel: Drop program size pointer from vec4/fs assembly getters.Kenneth Graunke2018-03-021-2/+2
* intel/eu: Plumb header present bit to codegen helpers for HDC messages.Francisco Jerez2018-03-021-6/+14
* intel/ir: Allow representing additional flag subregisters in the IR.Francisco Jerez2018-03-021-2/+2
* intel/fs: Set up sampler message headers in the visitor on gen7+Jason Ekstrand2018-03-011-18/+3
* intel/compiler: Lower flrp32 on Gen11+Matt Turner2018-02-281-1/+1
* intel/compiler/fs: Implement ddy without using align16 for Gen11+Matt Turner2018-02-281-8/+38
* intel/compiler/fs: Simplify ddx/ddy code generationMatt Turner2018-02-281-42/+21
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