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path: root/src/intel/compiler/brw_fs_generator.cpp
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* intel/fs: Emit HALT for discard on Gen4-5Jason Ekstrand2020-05-301-20/+76
* intel/fs,vec4: Pull stall logic for memory fences up into the IRCaio Marcelo de Oliveira Filho2020-04-291-10/+10
* intel/fs: Allow FS_OPCODE_SCHEDULING_FENCE stall on registersCaio Marcelo de Oliveira Filho2020-04-291-2/+27
* intel/ir: Pass block cycle count information explicitly to disassembler.Francisco Jerez2020-04-281-1/+1
* intel/ir: Use brw::performance object instead of CFG cycle counts for codegen...Francisco Jerez2020-04-281-3/+4
* replace _mesa_logbase2 with util_logbase2Dylan Baker2020-04-211-1/+1
* intel/fs,vec4: Properly account SENDs in IVB memory fenceCaio Marcelo de Oliveira Filho2020-04-201-3/+6
* anv: Advertise SEND count through VK_EXT_pipeline_executable_propertiesJason Ekstrand2020-04-151-0/+1
* intel/fs: Fix workaround for VxH indirect addressing bug under control flow.Francisco Jerez2020-03-101-10/+28
* intel/compiler: Discount NOPs from instruction countsMatt Turner2020-03-091-3/+9
* intel/compiler: Pass shader_stats for each SIMD modeMatt Turner2020-03-091-2/+1
* intel/fs/gen12: Fixup/simplify SWSB annotations of SIMD32 scratch writes.Francisco Jerez2020-02-141-7/+3
* intel/fs: Add virtual instruction to load mask of live channels into flag reg...Francisco Jerez2020-02-141-1/+10
* intel/fs: Write the address register with NoMask for MOV_INDIRECTJason Ekstrand2020-01-311-0/+9
* intel/compiler: Clear accumulator register before EOTSagar Ghuge2020-01-271-0/+18
* intel/compiler: Split has_64bit_types into float/intMatt Turner2020-01-221-1/+1
* intel/fs: Add FS_OPCODE_SCHEDULING_FENCECaio Marcelo de Oliveira Filho2020-01-211-0/+5
* intel/fs: Implement the new load/store_scratch intrinsicsJason Ekstrand2019-11-111-1/+9
* intel/compiler: Report the number of non-spill/fill SEND messagesKenneth Graunke2019-10-171-5/+30
* intel/fs/gen11+: Fix CS_OPCODE_CS_TERMINATE codegen.Francisco Jerez2019-10-111-6/+9
* intel/fs/gen12: Fix barrier codegen.Francisco Jerez2019-10-111-2/+6
* intel/fs/gen12: Add scheduling information to the IR.Francisco Jerez2019-10-111-0/+1
* intel/eu/gen12: Set SWSB annotations in hand-crafted assembly.Francisco Jerez2019-10-111-0/+39
* intel/fs/gen12: Add codegen support for the SYNC instruction.Francisco Jerez2019-10-111-0/+4
* intel/eu/gen12: Don't set DD control, it's gone.Francisco Jerez2019-10-111-4/+8
* intel/eu/gen12: Use SEND instruction for split sends.Francisco Jerez2019-10-111-1/+2
* intel/eu/gen12: Codegen SEND descriptor regions correctly.Francisco Jerez2019-10-111-3/+6
* intel/fs: Allow CLUSTER_BROADCAST to do type conversionJason Ekstrand2019-09-201-1/+1
* intel/fs: don't forget the stride at generate_shufflePaulo Zanoni2019-09-201-1/+2
* intel/fs: fix SHADER_OPCODE_CLUSTER_BROADCAST for SIMD32Paulo Zanoni2019-09-191-1/+10
* intel/fs: the maximum supported stride width is 16Paulo Zanoni2019-09-191-1/+3
* i965/fs/generator: add new opcode to set float controls modes in control regi...Samuel Iglesias Gonsálvez2019-09-171-0/+6
* i965/fs/generator: refactor rounding mode helper in preparation for float con...Samuel Iglesias Gonsálvez2019-09-171-2/+9
* Revert "intel/fs: Move the scalar-region conversion to the generator."Jason Ekstrand2019-09-061-1/+1
* intel/compiler: Refactor FB write message control setup into a helper.Kenneth Graunke2019-08-271-26/+1
* intel/compiler: Fill a compiler statistics structJason Ekstrand2019-08-121-1/+10
* intel/compiler: add ability to override shader's assemblyDanylo Piliaiev2019-08-051-3/+17
* intel/fs: Use ALIGN16 instructions for all derivatives on gen <= 7Jason Ekstrand2019-07-301-21/+62
* i965/fs: Print the scheduler mode.Matt Turner2019-07-301-8/+19
* i965/fs: Add a shader_stats struct.Matt Turner2019-07-301-4/+4
* intel/fs: Add support for SLM fence in Gen11Caio Marcelo de Oliveira Filho2019-07-111-2/+3
* intel/fs: Use nir_lower_interpolation on gen11+Jason Ekstrand2019-07-021-1/+1
* intel/compiler: Enable the emission of ROR/ROL instructionsSagar Ghuge2019-07-011-0/+10
* intel/compiler: fix derivative on y axis implementationLionel Landwerlin2019-06-271-21/+5
* intel/fs: Add an UNDEF instruction to avoid excess live rangesJason Ekstrand2019-06-041-0/+3
* intel/fs: Do a stalling MFENCE in endInvocationInterlock()Jason Ekstrand2019-05-301-2/+3
* intel/fs,vec4: Use g0 as the header for MFENCEJason Ekstrand2019-05-301-2/+2
* intel/compiler: Unset flag reg when FB write is not predicatedMatt Turner2019-05-071-0/+1
* intel/fs: Remove fs_generator::generate_linterp from gen11+.Rafael Antognolli2019-04-221-44/+6
* intel/fs: Move the scalar-region conversion to the generator.Rafael Antognolli2019-04-221-1/+1
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