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* winsys/amdgpu: decay max_ib_size over timeNicolai Hähnle2016-06-011-0/+2
* winsys/amdgpu: implement IB chaining on the gfx ringNicolai Hähnle2016-06-012-18/+109
* winsys/amdgpu: consolidate IB size management in amdgpu_ib_finalizeNicolai Hähnle2016-06-011-9/+9
* radeon/winsys: introduce radeon_winsys_cs_chunkNicolai Hähnle2016-06-0111-75/+98
* radeonsi/sid: add packet definitions for IB chainingNicolai Hähnle2016-06-012-0/+15
* winsys/amdgpu: start with smaller IBs, growing as necessaryNicolai Hähnle2016-06-012-10/+71
* winsys/amdgpu: add amdgpu_ib and amdgpu_cs_from_ib helper functionsNicolai Hähnle2016-06-012-7/+37
* winsys/amdgpu: extract IB big buffer allocation for re-useNicolai Hähnle2016-06-011-17/+29
* winsys/amdgpu: add IB buffer in amdgpu_get_new_ibNicolai Hähnle2016-06-011-121/+113
* gallium/radeon: use cs_check_space throughoutNicolai Hähnle2016-06-015-10/+7
* radeon/winsys: add cs_check_spaceNicolai Hähnle2016-06-013-0/+23
* winsys/amdgpu: simplify interface of amdgpu_get_new_ibNicolai Hähnle2016-06-012-14/+14
* winsys/amdgpu: add amdgpu_cs_has_user_fenceNicolai Hähnle2016-06-011-4/+8
* gallium/cso: allow saving the first fragment shader image slotNicolai Hähnle2016-06-012-0/+48
* gallium/u_inlines: allow NULL src in util_copy_image_viewNicolai Hähnle2016-06-011-4/+11
* gallium: add PIPE_BARRIER_ALL defineNicolai Hähnle2016-06-011-0/+1
* radeonsi: set correct stencil tile mode for texturingMarek Olšák2016-06-011-2/+8
* winsys/amdgpu: set flags correctly when allocating depth-stencil buffersMarek Olšák2016-06-011-2/+8
* gallium/radeon: lower memory usage during texture transfersMarek Olšák2016-06-012-4/+29
* gallium/radeon: invalidate busy linear textures for whole-texture uploadsMarek Olšák2016-06-011-2/+28
* gallium/radeon: degrade tiled textures mapped often to linearMarek Olšák2016-06-012-0/+103
* gallium/radeon: clean up and better comment use_staging_textureMarek Olšák2016-06-011-19/+23
* radeonsi: set some colorbuffer register fields at emit timeMarek Olšák2016-06-013-50/+47
* radeonsi: implement global resetting of texture descriptorsMarek Olšák2016-06-014-6/+64
* radeonsi: move code for setting one shader image into separate functionMarek Olšák2016-06-011-71/+82
* radeonsi: set some image descriptor fields at bind timeMarek Olšák2016-06-014-71/+111
* gallium/radeon: strenghten some checking for DMA preparationMarek Olšák2016-06-011-1/+6
* gallium/util: add util_texrange_covers_whole_level from radeonMarek Olšák2016-06-012-17/+18
* radeonsi: fix the raster config setup for 1 RB iceland chipsAlex Deucher2016-06-011-1/+4
* nv50/ir: fix error finding free element in bitset in some situationsIlia Mirkin2016-05-311-0/+6
* nv50/ir: print relevant file's bitset when showing RA infoIlia Mirkin2016-05-311-4/+4
* radeonsi: Decompress DCC textures in a render feedback loop.Bas Nieuwenhuizen2016-05-314-0/+113
* radeonsi: Add counter to check if a texture is bound to a framebuffer.Bas Nieuwenhuizen2016-05-314-0/+26
* vc4: Fix compiler warnings in fail_instr path of QIR validate passRhys Kidd2016-05-311-10/+10
* svga: change enum pipe_resource_usage back to unsignedBrian Paul2016-05-311-1/+1
* radeonsi: fix CP DMA hazard with index buffer fetchesMarek Olšák2016-05-311-2/+20
* r600g: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
* radeonsi: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
* gallium/u_blitter: do GL-compliant integer resolvesMarek Olšák2016-05-311-19/+7
* radeonsi: don't flush TC at the end of IBs on DRM >= 3.2.0Marek Olšák2016-05-311-2/+3
* gallium/radeon: fixed division by zeroJakob Sinclair2016-05-311-0/+3
* nvc0/ir: fix spilling predicates to registersIlia Mirkin2016-05-301-0/+4
* nvc0/ir: limit max number of regs based on availability in SMIlia Mirkin2016-05-302-2/+4
* nv50/ir: record number of threads in a compute shaderIlia Mirkin2016-05-305-2/+10
* nv50/ir: Add missing handling of U64/S64 in inlinesPierre Moreau2016-05-301-1/+3
* vc4: Fix doxygen warnings12.0-branchpointRhys Kidd2016-05-302-6/+6
* mesa_glinterop: remove mesa_glinterop typedefsEmil Velikov2016-05-301-3/+3
* gallivm: initialize init_native_targets_once_flag correctlyFrederic Devernay2016-05-301-1/+1
* nvc0/ir: fix emission of predicate spill to registerIlia Mirkin2016-05-301-1/+2
* nvc0: fix some compute texture validation bits on keplerIlia Mirkin2016-05-303-2/+7
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