| Commit message (Collapse) | Author | Age | Files | Lines |
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This is based on grepping for brw->is_haswell in i965 to see how GEN 7.5
differs from GEN 7. Slightly tested with Xonotic and some Mesa demos.
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Missed this commit when preparing PCB changes for upstreaming.
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Move the estimate functions out of the tables and kill the tables.
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This reduces the number of source files need to be recompiled when GPE
functions are changed other than regular clean ups.
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Eliminate pipeline and GPE function vectors and have the pipeline functions
call the GPE emit functions directly.
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We want to access the user buffer, if available, when primitive restart is
enabled and the restart index/primitive type is not natively supported.
And since we are handling index buffer uploads in the driver with this change,
we can also work around misalignment of index buffer offsets.
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This allows us to remove ilo_shader_internal.h from ilo_gpe_gen7.c. The
unfinished code in 3DSTATE_DS, 3DSTATE_HS, and INTERFACE_DESCRIPTOR_DATA are
partly or entirely removed.
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The unmodified pipe_stream_output_info describes its outputs as if they are in
TGSI_FILE_OUTPUT. Remap the register indices to where they appear in the VUE.
TGSI_SEMANTIC_PSIZE needs a little care because it is at the W channel.
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Add ilo_gpe_init_fs_cso() to construct 3DSTATE_PS and shader part of
3DSTATE_WM once and early for fragment shaders.
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Replace pipe_rasterizer_state by ilo_rasterizer_state for the remaining GPE
functions for consistency.
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Add ilo_gpe_init_rasterizer_wm() to construct fixed-function part of
3DSTATE_WM once in create_rasterizer_state().
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Add ilo_gpe_init_gs_cso() to construct 3DSTATE_GS once and early for geometry
shaders.
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Move it to ilo_shader_internal.h. The goal is to make files not part of the
compiler include only ilo_shader.h eventually.
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We returned 0 instead of 1 for the number of layers when the array texutre is
single-layered. This fixed it on GEN7+.
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Add ilo_rasterizer_sf and initialize it in create_rasterizer_state().
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Introduce ilo_surface_cso and initialize it in create_surface(). With the
change, we can emit SURFACE_STATE directly from the CSO and remove
emit_surf_SURFACE_STATE(). We do not deal with depth/stencil surfaces yet.
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Introduce ilo_cbuf_cso and initialize it in set_constant_buffer(). As
ilo_view_surface is embedded in ilo_cbuf_cso, switch to emit_SURFACE_STATE()
for constant buffers and remove emit_cbuf_SURFACE_STATE().
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Introduce ilo_view_cso and initialize it in create_sampler_view(). Add
emit_SURFACE_STATE() to GPE, which can emit SURFACE_STATE from
ilo_view_surface.
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Define struct ilo_view_surface for SURFACE_STATE construction and emission.
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Remove hiz and dsa from the parameters. We would know whether HiZ buffer
exists from ilo_texture once it is supported. DSA state should not affect
3DSTATE_DEPTH_BUFFER.
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Introduce ilo_sampler_cso and initialize it in create_sampler_state(). This
saves us from having to perform CPU-intensive calculations to construct
hardware sampler states in draw_vbo().
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Introduce ilo_viewport_cso and initialize it in set_viewport_states(). This
saves us from having to perform CPU-intensive calculations to construct
hardware viewport states in draw_vbo().
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Take care of sampler views that have buffers as the underlying resources.
Update caps related to TBOs.
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The view extent was set to be the same as the depth while it should be set to
the number of layers. It makes a difference for 3D textures.
Also use this as a chance to clean up the code.
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For allocations, we need to support stencil-only and separate stencil
resources. For mapping, we need to support software tiling and
packing/unpacking for separate stencil resources.
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Always return a tile-aligned offset. Also fix for W tiling.
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Use ilo_buffer for buffer resources and ilo_texture for texture resources. A
major cleanup is necessitated by the separation.
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In preparation for the introduction of ilo_buffer.
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They were just stubs before.
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As we do not advertise MSAA support, this change should not make any
difference yet.
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There is no reason to waste the memory when the HW can support compact array
spacing (ARYSPC_LOD0).
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It seems a bit weird to have device limits in a context.
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We need only dev->gen and dev->gt, but it makes sense to expose other
information to the pipeline.
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