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* freedreno/drm: Fix memory leak in softpin implementationLasse Lopperi2020-01-101-0/+2
| | | | | | | | | | | | | | | | Free the memory allocated for cmds/reloc_bos array when destoying the associated ringbuffer. For similar fix for the non-softpin implementation see: https://gitlab.freedesktop.org/mesa/mesa/commit/d014af98b7afc69f4f733c8b8b6f2e3438e68407 Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2324 Fixes: f3cc0d2 ("freedreno: import libdrm_freedreno + redesign submit") Signed-off-by: Lasse Lopperi <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3342> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3342>
* ir3: Set up full/half register conflicts correctlyKristian H. Kristensen2020-01-091-2/+1
| | | | | | | | | | | | | | Setting up transitive conflicts between a full register and its two half registers (eg r0.x and hr0.x and hr0.y) will make the half registers conflict. They don't actually conflict and this prevents us from using both at the same time. Add and use a new ra helper that sets up transitive conflicts between a register and its subregisters, except it carefully avoids the subregister conflict. Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* turnip: Use VK_NULL_HANDLE instead of NULL.Bas Nieuwenhuizen2020-01-021-1/+1
| | | | | | | | | Only occurrence of implicitly converting pointer->int. Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2570>
* freedreno/ir3: fix flat shading againRob Clark2019-12-241-1/+1
| | | | | | | | | These days `ctx->inputs` is the split scalar input components and `ir->inputs` is the full vecN. This got fixed in the load_input case, but the load_interpolated_input case was missed. Fixes: bdf6b7018ce ("freedreno/ir3: re-work shader inputs/outputs") Signed-off-by: Rob Clark <[email protected]>
* turnip: disable B8G8R8 vertex formatsJonathan Marek2019-12-191-6/+6
| | | | | | | | | Looks like swap doesn't work as expected on these, disable them. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170>
* turnip: minor warning fixesJonathan Marek2019-12-192-2/+2
| | | | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3177> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3177>
* turnip: implement secondary command buffersJonathan Marek2019-12-193-2/+62
| | | | | | | | | | Uses a new "tu_cs_add_entries" function because tu_cs_emit_call doesn't work inside draw_cs (which is already called by tu_cs_emit_call). Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
* turnip: compute gmem offsets at renderpass creation timeJonathan Marek2019-12-194-66/+82
| | | | | | | | | | This makes it easier to implement secondary command buffers, since we no longer need to know the render area to set the gmem offsets for input attachments and CmdClearAttachments. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
* turnip: emit_compute_driver_params fixesJonathan Marek2019-12-191-17/+14
| | | | | | | | | | | | Offset was wrong, it is in vec4 not dwords. There's a hole between DP_NUM_WORK_GROUPS_Z and DP_LOCAL_GROUP_SIZE_X so use the IR3 enums. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
* turnip: emit base instance vs driver paramJonathan Marek2019-12-191-0/+53
| | | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
* freedreno/ir3: support load_base_instanceJonathan Marek2019-12-194-1/+12
| | | | | | | | Not supported by hardware, uses same mechanism as base vertex. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
* freedreno/registers: document vertex/instance id offset bitsJonathan Marek2019-12-192-2/+7
| | | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
* freedreno/a6xx: RB6_R8G8B8 is actually 32 bit RGBXKristian H. Kristensen2019-12-192-2/+2
| | | | | | Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
* freedreno/ir3: fix vertex shader sysvals with pre_assign_inputsJonathan Marek2019-12-191-1/+1
| | | | | | | | | | | | | | | | The first pre_assign_inputs loop doesn't pre-assign sysvals, so skip the second part for sysvals. The sysvals don't need to be pre-assigned since the state for those isn't shared between binning / nonbinning shaders. Fixes assert failures in cases where the sysvals didn't end up in the same registers for binning / nonbinning. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3168> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3168>
* turnip: don't set SP_FS_CTRL_REG0_VARYING if only fragcoord is usedJonathan Marek2019-12-181-1/+1
| | | | | | | | | | | | | Fixes artifacts in the subpasses demo, which has a shader using fragcoord without any varyings. It looks like setting this bit when there are no varyings can cause weirdness in some cases (without this change, if the previous shader had <= 8 varyings it would work, but with 9 varyings it would have artifacts). Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
* turnip: add cache invalidate to fix input attachment casesJonathan Marek2019-12-181-1/+15
| | | | | | | | | | | Fixes artifacts in the subpasses demo. Workaround texture cache with input attachments from GMEM by adding a cache invalidate between subpasses. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
* freedreno: Fix CP_MEM_TO_REG flag definitionsConnor Abbott2019-12-181-2/+4
| | | | | | | | | | | These actually mean something completely different, at least on A5xx and A6xx. The only other usage of the old flags on something older than A6xx was a typo, so I don't know if it was always this way, but at the same time it means that we don't have to worry too much about that. Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
* freedreno: Use new macros for CP_WAIT_REG_MEM and CP_WAIT_MEM_GTEConnor Abbott2019-12-181-6/+7
| | | | | | | | | | Similar to the existing usage for CP_COND_WRITE5, this makes it clear what each of the magic parameters are for. Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
* a6xx: Add more CP packetsConnor Abbott2019-12-182-19/+282
| | | | | | | | | | | | | | | | | | | | And add fields uncovered by looking at the firmware. I think this covers all the memory, register, and scratch manipulation opcodes that exist on A6xx, plus one additional nice find for Vulkan and describing a previously unknown opcode and documenting CP_WAIT_REG_MEM. Note that the bits for the CP_REG_TO_MEM count, as well as the formula for computing the actual count for both CP_REG_TO_MEM and CP_MEM_TO_REG, are changed because the A630 SQE firmware actually does something different. I haven't investigated older microcodes to see whether this extends back to A5xx and A4xx, but the only non-A6xx uses of this field result in the same bit-pattern when using the A6xx bit range and formula, so it should be safe to change the definition universally. Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
* freedreno/ir3: update prefetch input_offset when packing inlocsJonathan Marek2019-12-171-0/+4
| | | | | | | | | If the input location changes then prefetch input_offset needs to change. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3141> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3141>
* freedreno/a6xx: Document the CP_SET_DRAW_STATE enable bitsKristian H. Kristensen2019-12-172-22/+21
| | | | | | | | | | There are bits for binning, gmem and sysmem. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Rob Clark <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3131> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3131>
* turnip: Fix support for immutable samplers.Eric Anholt2019-12-162-12/+15
| | | | | | | | | | | | | We were setting up the hardware sampler state when updating a combined image sampler, but never looking at the immutable sampler for in the separate case. Fixes failures in dEQP-VK.binding_model.shader_access.primary_cmd_buf.sampler_immutable.fragment.* Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3127> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3127>
* turnip: don't set LRZ enable at end of renderpassJonathan Marek2019-12-171-1/+1
| | | | | | | | | Fixes hanging with cases that use more than one renderpass. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3122> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3122>
* freedreno/ir3: lower pack/unpack opsJonathan Marek2019-12-161-0/+24
| | | | | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3106> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3106>
* turnip: Add support for descriptor arrays.Eric Anholt2019-12-165-112/+217
| | | | | | | | | | | | | I had a bigger rework I was working on, but this is simple and gets tests passing. Fixes 36 failures in dEQP-VK.binding_model.shader_access.primary_cmd_buf.sampler_mutable.fragment.* (now all passing) Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3124> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3124>
* turnip: Drop unused variable.Eric Anholt2019-12-161-1/+0
| | | | | | We really need -Werror in CI. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3124>
* turnip: remove duplicate A6XX_SP_CS_CONFIG_NIBOJonathan Marek2019-12-161-2/+1
| | | | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
* turnip: change emit_ibo to be like emit_texturesJonathan Marek2019-12-161-32/+48
| | | | | | | | Adds missing alignment and error checking. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
* turnip: fix emit_iboJonathan Marek2019-12-161-8/+25
| | | | | | | | | | Based on the GL driver: -Compute needs different opcode (this fixes a GPU hang problem) -REG_A6XX_SP_IBO_LO/REG_A6XX_SP_CS_IBO_LO were swapped Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
* turnip: remove compute emit_border_colorJonathan Marek2019-12-161-1/+1
| | | | | | | | | Current tu6_emit_border_color doesn't work for compute and there's no example from the GL driver to base it on, so replace it with a finishme. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
* turnip: fix emit_textures for compute shadersJonathan Marek2019-12-161-6/+9
| | | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
* freedreno/ir3: lower mul_2x32_64Jonathan Marek2019-12-161-0/+3
| | | | | | | | lower_mul_2x32_64 generates mul_high opcodes, and lower_mul_high is done by nir_lower_alu, so call nir_lower_alu after nir_opt_algebraic. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: implement CmdFillBuffer/CmdUpdateBufferJonathan Marek2019-12-161-0/+56
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: don't require src image to be set for clear blitsJonathan Marek2019-12-162-2/+2
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: use common blit path for buffer copyJonathan Marek2019-12-163-166/+53
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: use single substream csJonathan Marek2019-12-162-25/+16
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: Lower usub_borrow.Eric Anholt2019-12-161-0/+2
| | | | | | | | Fixes dEQP-VK.glsl.builtin.function.integer.usubborrow.uvec2_mediump_fragment. Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2986> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2986>
* freedreno/ir3: add iterator macrosRob Clark2019-12-1313-76/+93
| | | | | | So many open coded list iterators were getting annoying. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add scheduler tracesRob Clark2019-12-134-0/+24
| | | | | | | Add some infrastructure to trace scheduler decisions. The next patch will add some more traces, just splitting this out to reduce clutter. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add last-baryf shaderdb statRob Clark2019-12-132-0/+6
| | | | | | | | | Sometimes sched changes that are a win in terms of instruction count and/or register pressure, are worse in real life, due to keeping varying storage locked for too long. Add a shader-db stat to give this more visibility. Signed-off-by: Rob Clark <[email protected]>
* turnip: implement subpass input attachmentsJonathan Marek2019-12-123-13/+42
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: CmdClearAttachments fixesJonathan Marek2019-12-121-4/+13
| | | | | | | Partial depth/stencil clear and skipping unused attachments. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: subpass reworkJonathan Marek2019-12-124-474/+300
| | | | | | | A renderpass is a tile load/store cycle. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: add dirty bit for push constantsJonathan Marek2019-12-122-14/+20
| | | | | | | Fixes push constants not updating in some cases. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: no 8x msaa on 128bpp formatsJonathan Marek2019-12-121-2/+4
| | | | | | | | We don't have an entry for cpp 128 in the tile_alignment table, but I don't think the HW supports this at all (blob driver just doesn't have 8x msaa). Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: fix VK_IMAGE_ASPECT_STENCIL_BIT image viewJonathan Marek2019-12-121-9/+15
| | | | | | | | Use a special format which allows sampling the stencil and set the correct swizzle. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: set FRAG_WRITES_SAMPMASK bitJonathan Marek2019-12-121-1/+2
| | | | | | | GPU hangs if SAMPMASK_REGID is used without this bit. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: set load_layer_id to zeroJonathan Marek2019-12-121-0/+8
| | | | | | | | We don't have layered rendering and ir3 doesn't support this intrinsic, so just set it to zero for now. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: update tile_align_w/tile_align_hJonathan Marek2019-12-121-2/+2
| | | | | | | | | | It looks like the actual tile alignment requirement is less than 32x32, but in some cases input attachment texture needs 64 alignment. Reduced the h alignment to 16 to compensate and it seems to work fine. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: fix tile layout logicJonathan Marek2019-12-121-3/+5
| | | | | | | | Use DIV_ROUND_UP and stop trying to increase the tile_count width/height once tile_align_w/tile_align_h are reached. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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