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* spirv: Make vtn_case a vtn_cf_nodeJason Ekstrand2020-04-032-8/+15
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
* spirv: Add cast and loop helpers for vtn_cf_nodeJason Ekstrand2020-04-032-5/+21
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
* spirv: Add a vtn_block() helperJason Ekstrand2020-04-031-20/+16
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
* intel/nir: Enable load/store vectorizationJason Ekstrand2020-04-031-11/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables the I/O vectorization pass that was originally written for ACO for Intel drivers. We enable it for UBOs, SSBOs, global memory, and SLM. We only enable vectorization for the scalar back-end because it vec4 makes certain alignment assumptions. Shader-db results with iris on ICL: total instructions in shared programs: 16077927 -> 16068236 (-0.06%) instructions in affected programs: 199839 -> 190148 (-4.85%) helped: 324 HURT: 0 helped stats (abs) min: 2 max: 458 x̄: 29.91 x̃: 4 helped stats (rel) min: 0.11% max: 38.94% x̄: 4.32% x̃: 1.64% 95% mean confidence interval for instructions value: -37.02 -22.80 95% mean confidence interval for instructions %-change: -5.07% -3.58% Instructions are helped. total cycles in shared programs: 336806135 -> 336151501 (-0.19%) cycles in affected programs: 16009735 -> 15355101 (-4.09%) helped: 458 HURT: 154 helped stats (abs) min: 1 max: 77812 x̄: 1542.50 x̃: 75 helped stats (rel) min: <.01% max: 34.46% x̄: 5.16% x̃: 2.01% HURT stats (abs) min: 1 max: 22800 x̄: 336.55 x̃: 20 HURT stats (rel) min: <.01% max: 17.11% x̄: 2.12% x̃: 1.00% 95% mean confidence interval for cycles value: -1596.83 -542.49 95% mean confidence interval for cycles %-change: -3.83% -2.82% Cycles are helped. total sends in shared programs: 814177 -> 809049 (-0.63%) sends in affected programs: 15422 -> 10294 (-33.25%) helped: 324 HURT: 0 helped stats (abs) min: 1 max: 256 x̄: 15.83 x̃: 2 helped stats (rel) min: 1.33% max: 67.90% x̄: 21.21% x̃: 15.38% 95% mean confidence interval for sends value: -19.67 -11.98 95% mean confidence interval for sends %-change: -23.03% -19.39% Sends are helped. LOST: 7 GAINED: 2 Most of the helped shaders were in the following titles: - Doom - Deus Ex: Mankind Divided - Aztec Ruins - Shadow of Mordor - DiRT Showdown - Tomb Raider (Rise, I think) Five of the lost programs are SIMD16 shaders we lost from dirt showdown. The other two are compute shaders in Aztec Ruins which switched from SIMD8 to SIMD16. Vulkan pipeline-db stats on ICL: Instructions in all programs: 296780486 -> 293493363 (-1.1%) Loops in all programs: 149669 -> 149669 (+0.0%) Cycles in all programs: 90999206722 -> 88513844563 (-2.7%) Spills in all programs: 1710217 -> 1730691 (+1.2%) Fills in all programs: 1931235 -> 1958138 (+1.4%) By far the most help was in the Tomb Raider games. A couple of Batman games with DXVK were also helped. In Shadow of the Tomb Raider: Instructions in all programs: 41614336 -> 39408023 (-5.3%) Loops in all programs: 32200 -> 32200 (+0.0%) Cycles in all programs: 1875498485 -> 1667034831 (-11.1%) Spills in all programs: 196307 -> 214945 (+9.5%) Fills in all programs: 282736 -> 307113 (+8.6%) Benchmarks of real games I've done on this patch: - Rise of the Tomb Raider: +3% - Shadow of the Tomb Raider: +10% Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* nir/load_store_vectorize: Add support for nir_var_mem_globalJason Ekstrand2020-04-031-4/+53
| | | | | Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* nir/load_store_vectorize: Use nir_iadd_imm for offsetsJason Ekstrand2020-04-031-1/+1
| | | | | | | This makes it capable of handling 64-bit offsets Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* nir/load_store_vectorize: Fix shared atomic infoJason Ekstrand2020-04-031-14/+14
| | | | | | | | | These were clearly copied and pasted from SSBOs. The shared atomics don't have an SSBO index so their offset is src0 and data is src1. Fixes: ce9205c03bd20 "nir: add a load/store vectorization pass" Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* intel/nir: Lower memory access bit sizes laterJason Ekstrand2020-04-031-2/+12
| | | | | | | | | | | We're about to do load/store vectorization right before this but we need that to happen after we've done a round of optimization. Otherwise, we'll be getting unoptimized NIR in from ANV and the vectorizer won't be able to do anything with it. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* iris: Set alignments on cbuf0 and constant readsJason Ekstrand2020-04-031-0/+4
| | | | | Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* anv: Improve brw_nir_lower_mem_access_bit_sizesJason Ekstrand2020-04-031-5/+5
| | | | | | | | | | This commit makes us take both bit size and alignment into account so that we can properly handle cases such as when we have a 32-bit store to an 8-bit-aligned address. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* intel/fs: Choose memory message type based on bit sizeJason Ekstrand2020-04-031-30/+42
| | | | | | | | | | | | | | Thanks to the NIR vectorizing pass, we're about to see alignments that are higher than the bit size. Previously, we could use either and we just happened to choose alignment (probably the wrong choice) so it's harmless to switch to detecting based on bit size. This commit changes things to take both into account which is more accurate to what the messages we're using do. We also beef up the asserts and make them more consistent, more accurate, and more complete. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
* ir3: Disable copy prop for immediate ldlw offsetsBrian Ho2020-04-031-0/+3
| | | | | | | | | | | | | | | | Immediate offsets are currently collapsed for ldlw, but ldlw does behave correctly with immediate values. For example, `ldlw.u32 r0.x, l[4], 1` actually means to use the value of regid 4 (r1.x) as the offset when we actually want it to use the imm value of 4 as the offset. This commit disables copy prop for ldlw offsets so the same intrinsic gets compiled to: mov.u32u32 r0.y, 0x00000004 ldlw.u32 r0.x, l[r0.y], 1 Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4439> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4439>
* radv: fix null winsys gpu_info arrayRhys Perry2020-04-031-28/+27
| | | | | | | | Signed-off-by: Rhys Perry <[email protected]> Fixes: de550805c5d ('radv/winsys: spoof some values for num_render_backends in the null winsys') Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4437> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4437>
* pan/midgard: Fix a divide by zero in emit_alu_bundleIcecream952020-04-031-2/+2
| | | | | | | | | | | util_dynarray_grow_bytes divides by eltsize, but it's possible for bundle->padding to be zero. I changed the other call to util_dynarray_grow_bytes for consistency. Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4397> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4397>
* turnip: Advertise 8 bit subpixel precisionBrian Ho2020-04-031-1/+1
| | | | | | | | | | | | Previously, turnip advertised 4-bit subpixel precision when in practice, a6xx seems to render with 8-bit precision. This caused dEQP-VK.renderpass2.suballocation.subpass_dependencies.late_fragment_tests.* to fail because they compare images rendered with turnip against ones rendered via a software reference implementation parameterized by turnip's VkPhysicalDeviceLimits.subPixelPrecisionBits value. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4172> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4172>
* mesa: update pipeline when re-linking a program in usePierre-Eric Pelloux-Prayer2020-04-031-2/+34
| | | | | | | | | | | | | | Updating was only done for bound program, so add the same logic for existing pipelines. This fixes piglit test arb_shader_storage_buffer_object-issue1258. It might also help the following issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1258 Reviewed-by: Timothy Arceri <[email protected]> Acked-by: Marek Olšák <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4404> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4404>
* nv50: don't try to upload MSAA settings for BUFFER texturesIlia Mirkin2020-04-031-1/+1
| | | | | | | | | | | | | | We need the MSAA scaling parameters to properly fetch samples from MSAA textures. These are stored in the miptree which wraps all regular textures. However it does not wrap buffer textures, so make sure to skip them rather than accessing out-of-bounds or unmapped memory. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2727 Fixes: 3bd40073b98 ("nv50: add support for texelFetch'ing MS textures") Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4424> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4424>
* intel/aub_viewer: fix access to freed memoryLionel Landwerlin2020-04-031-1/+1
| | | | | | | | | | Windows closed while we're displaying them might lead to invalid memory accessed, so use the safe iterators on the list of windows. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4430> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4430>
* radv, aco: collect statistics if requested but executables are notRhys Perry2020-04-034-17/+22
| | | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
* aco: add vmem/smem score statisticRhys Perry2020-04-033-9/+155
| | | | | | | | | | | This isn't perfect (for example, changes might not be too meaningful when comparing shaders with different control flow) but it should be useful for evaluating scheduler changes. Signed-off-by: Rhys Perry <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
* aco: add various compiler statisticsRhys Perry2020-04-035-5/+155
| | | | | | | | | | | | | | | | Adds these statistics: - hash of code and constant data - number of instructions - number of copies from pseudo-instructions - number of branches - estimate of cycles spent not waiting in s_waitcnt - number of vmem/smem "clauses" - sgpr/vgpr usage before scheduling Signed-off-by: Rhys Perry <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
* radv: add code for exposing compiler statisticsRhys Perry2020-04-034-7/+52
| | | | | | | | | | Statistics will be added to ACO in later commits. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2965>
* EGL: Add eglSetDamageRegionKHR to GLVND dispatch listDaniel Stone2020-04-031-0/+3
| | | | | | | | | | | | | This was missed in the original conversion, which added support for eglSetDamageRegionKHR to local EGL exports, but forgot to generate updated dispatch for GLVND. Signed-off-by: Daniel Stone <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Fixes: 9827547313c7 ("egl/android: support for EGL_KHR_partial_update") Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4403> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4403>
* docs: update calendar, add news item, and link releases notes for 20.0.4Eric Engestrom2020-04-033-4/+7
| | | | | | | | Note that the next 20.0.x releases numbers have been shifted as this was not one of the planned releases. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
* docs/relnotes: add sha256sum for 20.0.4Eric Engestrom2020-04-031-1/+1
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
* docs: add release notes for 20.0.4Eric Engestrom2020-04-031-0/+68
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4428>
* util/xmlconfig: fix sha1 comparison codePierre-Eric Pelloux-Prayer2020-04-031-4/+5
| | | | | | | | Fixes: 8f48e7b1e99 ("util/xmlconfig: add new sha1 application attribute") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2730 Reviewed-by: Dave Airlie <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4426> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4426>
* radv/llvm: enable 16-bit storage features on GFX6-GFX7Samuel Pitoiset2020-04-031-8/+7
| | | | | | | | | | | | | | Should allow to play Doom Eternal on GFX6-GFX7 because the driver now supports storageBuffer16BitAccess. It's now supported and all CTS tests pass. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/857 Cc: 20.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
* ac/nir: split 16-bit SSBO stores on GFX6Samuel Pitoiset2020-04-031-4/+5
| | | | | | | | | | | | Due to possible alignment issues, make sure to split stores of 16-bit vectors. Doom Eternal requires storageBuffer16BitAccess. Cc: 20.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
* ac/nir: split 16-bit load/store to global memory on GFX6Samuel Pitoiset2020-04-031-4/+2
| | | | | | | | | | | | Due to possible alignment issues, make sure to split loads/stores of 16-bit vectors. Doom Eternal requires storageBuffer16BitAccess. Cc: 20.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
* radv/llvm: enable 8-bit storage features on GFX6-GFX7Samuel Pitoiset2020-04-031-7/+6
| | | | | | | | It's now supported and all CTS tests pass. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
* ac/nir: split 8-bit SSBO stores on GFX6Samuel Pitoiset2020-04-031-0/+9
| | | | | | | | | Due to possible alignment issues, make sure to split stores of 8-bit vectors. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
* ac/nir: split 8-bit load/store to global memory on GFX6Samuel Pitoiset2020-04-031-9/+22
| | | | | | | | | Due to possible alignment issues, make sure to split loads/stores of 8-bit vectors. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
* aco: always optimize v_mad to v_madak in presence of literalsSamuel Pitoiset2020-04-031-2/+11
| | | | | | | | | | | | | | | | | | | | v_mad and v_madak are both 64-bit instructions, so it doesn't increase code size to always apply a 32-bit literal instead of using v_mad and a sgpr which contains that literal. Found with some Youngblood shaders but help some other games. vkpipeline-db (VEGA10): Totals from affected shaders: SGPRS: 46168 -> 46016 (-0.33 %) VGPRS: 45576 -> 45564 (-0.03 %) Code Size: 5187208 -> 5179584 (-0.15 %) bytes Max Waves: 3297 -> 3297 (0.00 %) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4410> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4410>
* glsl/lower_precision: Use vector.back() instead of vector.end()[-1]Neil Roberts2020-04-031-13/+13
| | | | | | | | | | | | | | | | The use of vector.end()[-1] seems to generate warnings in Coverity about not allowing a negative argument to a parameter. The intention with the code snippet is just to access the last element of the vector. The vector.back() call acheives the same thing, is clearer and will hopefully fix the Coverity warning. I’m not exactly sure why Coverity thinks the array index can’t be negative. cplusplus.com says that vector::end() returns a random access iterator and that the type of the array index operator argument to that should be the difference type for the container. It then also says that difference_type for a vector is "a signed integral type". Reviewed-by: Eric Anholt <[email protected]>
* clover: fix build with single library clang buildKarol Herbst2020-04-031-10/+16
| | | | | | | | Closes: #2560 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4417> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4417>
* radv: Filter extensions not whitelisted for AndroidDrew Davenport2020-04-031-2/+80
| | | | | | | | | | | Android enforces through CTS a whitelist of Vulkan extensions that are allowed in each Android version. When building radv for Android, disable extensions that are unknown to the version of Android for which radv is being built. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4398> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4398>
* st/vdpau: make query test for 2D supportIlia Mirkin2020-04-031-2/+2
| | | | | | | | | | The 3D check has been there since the dawn of time, but I see no reason for it, most likely a typo. When the surfaces are actually created, they use the 2D resource type (as expected). Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
* st/vdpau: avoid asserting on new VDP_YCBCR_* formatsIlia Mirkin2020-04-031-2/+21
| | | | | | | | | | | | Depending on user's vdpau headers, not all of those defines may exist. Eventually we may want a private copy of these, but this is simple enough for now. Fixes asserts when running vdpauinfo which supports these recently added formats. Signed-off-by: Ilia Mirkin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4108>
* nir/from_ssa: Only chain movs when a src is also a destJason Ekstrand2020-04-021-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The algorithm we use for resolving parallel copy instructions plays this little shell game with the values. The reason for this is that it lets us handle cases where, for instance we have a -> b and b -> a and we need to use a temporary to do a swap. One result of this algorithm is that it tends to emit a lot of mov chains which are typcially really bad for GPUs where a mov is far from free. For instance, it's likely to turn this: r16 = ssa_0; r17 = ssa_0; r18 = ssa_0; r15 = ssa_0 into this: r15 = mov ssa_0 r18 = mov r15 r17 = mov r18 r16 = mov r17 which, if it's the only thing in a block (this is common for phis) is impossible for a scheduler to fix because of the dependencies and you end up with significant stalling. If, on the other hand, we only do the chaining in the actual case where we need to free up a so that it can be used as a destination, we can emit this: r15 = mov ssa_0 r18 = mov ssa_0 r17 = mov ssa_0 r16 = mov ssa_0 which is far nicer to the scheduler. On Intel, our copy propagation pass will undo the chain for us so this has no shader-db impact. However, for less intelligent back-ends, it's probably a lot better. Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4412> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4412>
* freedreno: Rename RB_DONE_TSConnor Abbott2020-04-026-9/+9
| | | | | | | This makes the various cache_flush implementations make more sense. Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
* freedreno: Cleanup event namesConnor Abbott2020-04-021-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that every *_TS event, i.e. every event which requires a seqno pointer, also allows generating an interrupt in the kernel, at least since a3xx. And furthermore these interrupts are named by the kgsl kernel driver and already in envytools. Therefore it's possible to map out what the *_TS events are with 100% certainty, given access to the hardware, by sending a CP_EVENT_WRITE with bit 31 set, unmasking all interrupts in the kernel, and logging which ones get hit. I've done this for a6xx, and I've also looked at the a5xx firmware, and the list of TS interrupts is the same as a6xx, so I have a pretty good idea of what the a5xx events are. I also fixed a few related things along the way: - VIZQUERY_END overlaps with WT_DONE_TS, but VIZQUERY_START was also a mess, with neither VIZQUERY_START nor HLSQ_FLUSH using variants. I added what seems like reasonable variants, based on the existing comment and the fact that HLSQ_FLUSH is only used in Mesa with a3xx and a4xx. - CACHE_FLUSH_AND_INVALIDATE seems to come straight from R600, and I have no idea if it's actually valid with a2xx, but given that RB_DONE_TS exists in the interrupt mask since a3xx, I guessed that RB_DONE_TS hasn't changed position since then and put it down as a3xx+ and limited CACHE_FLUSH_AND_INVALIDATE to a2xx. Someone with the relevant hardware should be able to confirm. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4065>
* gallivm: fix stream id fetchRoland Scheidegger2020-04-021-4/+3
| | | | | | | | | | | | | Fetching the stream id directly can crash since bld->immediates may not exist (if there's too many immediates or we use the array due to indirect accesses). So just call emit_fetch_immediate instead. v2: fix the swizzle Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
* gallivm: switch the mask6/mask7 cases for signed rgtc formatsRoland Scheidegger2020-04-021-2/+2
| | | | | | | | | This fixes some regressions where -1.0/1.0 results got flipped, but it's still broken in some cases. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
* gallivm: fix rgtc2 formatRoland Scheidegger2020-04-021-0/+2
| | | | | | | | | | In some cases, there can be garbage in the upper bits after the channel decode - for dxt5 this didn't matter (as the upper bits are shifted out anyway) but for rgtc2 formats it does. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4416>
* anv/image: Use align_u64 for image offsetsJason Ekstrand2020-04-021-2/+2
| | | | | | | | | | | | | The ALIGN functions in util/u_math.h work on uintptr_t whose size changes depending on your platform. Use ones which take an explicit 64-bit type instead to avoid 32-bit platform issues. Cc: [email protected] Reported-by: Mark Janes <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4414> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4414>
* gallium: enable EGL_EXT_image_dma_buf_import_modifiers unconditionallyAdam Jackson2020-04-022-21/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a re-do of [1]. Enable EGL_EXT_image_dma_buf_import_modifiers with EXT_image_dma_buf_import. This allows users to use queryDmaBufFormats to query the list of supported formats even if modifiers are not supported. With this change, queryDmaBufModifiers always returns zero modifiers. A compositor survey reveals that this should be fine: wlroots [2], Weston [3], Mutter [4] [5], kwin [6] and xorg-xserver [7] seem to all support this case gracefully. Tested with Sway and wlroots by running weston-info and checking the list of formats advertised by zwp_linux_dmabuf_v1. Also ran weston-simple-egl and checked zwp_linux_dmabuf_v1 was used instead of wl_drm. [1]: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1812 [2]: https://github.com/swaywm/wlroots/blob/8707a9b7ecbba0321804604d9ea954a46ecced21/render/egl.c#L629 [3]: https://gitlab.freedesktop.org/wayland/weston/-/blob/786490cb53439624fd3c20b9e19d3ea5ec316c00/libweston/renderer-gl/gl-renderer.c#L2337 [4]: https://gitlab.gnome.org/GNOME/mutter/-/blob/f0df07cba3ca308b47c9aefcc8112e8880fd9950/src/wayland/meta-wayland-dma-buf.c#L486 [5]: https://gitlab.gnome.org/GNOME/mutter/-/blob/0a6034ef3a745c25ab63c2ca8d4ae08bc5e09d88/src/backends/native/meta-renderer-native.c#L399 [6]: https://cgit.kde.org/kwin.git/tree/platformsupport/scenes/opengl/egl_dmabuf.cpp?id=9b7ab4d16a8ee0cb35108362ee5aa046f4ae20b7#n473 [7]: https://gitlab.freedesktop.org/xorg/xserver/-/blob/26004df63c25061586a967f3586795a75280acc2/glamor/glamor_egl.c#L682 Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4298> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4298>
* driconf: whilelist more games for glthreadMarek Olšák2020-04-021-0/+35
| | | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4402> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4402>
* tracie: Switch to using shutil.move for cross filesystem movesRohan Garg2020-04-021-2/+3
| | | | | | | | | | | | | | When running tracie in a docker container, renaming files from inside the container to a bind-mounted folder on the host causes a invalid cross-device link due to os.rename limitations. Switching to shutil allows us to overcome this. Signed-off-by: Rohan Garg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4377> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4377>
* wgl: do not create screen from DllMainErik Faye-Lund2020-04-023-7/+31
| | | | | | | | | | | | | There's a lot of operations that aren't allowed from DllMain, so we shouldn't create a driver-screen from there. So let's instead delay this until it's needed from a normal function call. See https://docs.microsoft.com/en-us/windows/win32/dlls/dllmain for details about what is allowed and isn't from DllMain. Reviewed-by: Neha Bhende <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4307>