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-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_vtbl.c12
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c1
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_copy.c10
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_program.h2
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c10
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c60
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texture.c22
-rw-r--r--src/mesa/main/texfetch.c2
-rw-r--r--src/mesa/main/texgetimage.c27
-rw-r--r--src/mesa/shader/prog_optimize.c2
13 files changed, 97 insertions, 56 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index ab6f1580806..b129b1f1c3f 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -112,6 +112,7 @@ void brw_validate_state(struct brw_context *brw);
void brw_upload_state(struct brw_context *brw);
void brw_init_state(struct brw_context *brw);
void brw_destroy_state(struct brw_context *brw);
+void brw_clear_validated_bos(struct brw_context *brw);
/***********************************************************************
* brw_state_cache.c
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index f4283bda1b3..af8dfb4c15c 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -143,7 +143,7 @@ static void xor_states( struct brw_state_flags *result,
result->cache = a->cache ^ b->cache;
}
-static void
+void
brw_clear_validated_bos(struct brw_context *brw)
{
int i;
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index dc47f08dd45..72749b3859d 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -46,7 +46,7 @@
#include "brw_state.h"
#include "brw_fallback.h"
#include "brw_vs.h"
-
+#include "brw_wm.h"
static void
dri_bo_release(dri_bo **bo)
@@ -66,8 +66,14 @@ static void brw_destroy_context( struct intel_context *intel )
brw_destroy_state(brw);
brw_draw_destroy( brw );
-
- _mesa_free(brw->wm.compile_data);
+ brw_clear_validated_bos(brw);
+ if (brw->wm.compile_data) {
+ _mesa_free(brw->wm.compile_data->instruction);
+ _mesa_free(brw->wm.compile_data->vreg);
+ _mesa_free(brw->wm.compile_data->refs);
+ _mesa_free(brw->wm.compile_data->prog_instructions);
+ _mesa_free(brw->wm.compile_data);
+ }
for (i = 0; i < brw->state.nr_color_regions; i++)
intel_region_release(&brw->state.color_regions[i]);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 77e3b2c32af..6895f644104 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -157,7 +157,6 @@ static void do_wm_prog( struct brw_context *brw,
sizeof(*c->prog_instructions));
c->vreg = _mesa_calloc(BRW_WM_MAX_VREG * sizeof(*c->vreg));
c->refs = _mesa_calloc(BRW_WM_MAX_REF * sizeof(*c->refs));
- c->vreg = _mesa_calloc(BRW_WM_MAX_VREG * sizeof(*c->vreg));
} else {
void *instruction = c->instruction;
void *prog_instructions = c->prog_instructions;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 4b5fe7be9f5..767d04d2f4b 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -221,6 +221,8 @@ intelCopyTexImage1D(GLcontext * ctx, GLenum target, GLint level,
return;
fail:
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__);
_mesa_meta_CopyTexImage1D(ctx, target, level, internalFormat, x, y,
width, border);
}
@@ -268,6 +270,8 @@ intelCopyTexImage2D(GLcontext * ctx, GLenum target, GLint level,
return;
fail:
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__);
_mesa_meta_CopyTexImage2D(ctx, target, level, internalFormat, x, y,
width, height, border);
}
@@ -292,6 +296,8 @@ intelCopyTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
if (!do_copy_texsubimage(intel_context(ctx), target,
intel_texture_image(texImage),
internalFormat, xoffset, 0, x, y, width, 1)) {
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__);
_mesa_meta_CopyTexSubImage1D(ctx, target, level, xoffset, x, y, width);
}
}
@@ -317,8 +323,8 @@ intelCopyTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
internalFormat,
xoffset, yoffset, x, y, width, height)) {
- DBG("%s - fallback to _mesa_meta_CopyTexSubImage2D\n", __FUNCTION__);
-
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "%s - fallback to swrast\n", __FUNCTION__);
_mesa_meta_CopyTexSubImage2D(ctx, target, level,
xoffset, yoffset, x, y, width, height);
}
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_program.h b/src/mesa/drivers/dri/r300/compiler/radeon_program.h
index 33db3ea0ff8..03592884eb2 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_program.h
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_program.h
@@ -191,7 +191,7 @@ struct rc_src_register lmul_swizzle(unsigned int swizzle, struct rc_src_register
static inline void reset_srcreg(struct rc_src_register* reg)
{
- memset(reg, 0, sizeof(reg));
+ memset(reg, 0, sizeof(struct rc_src_register));
reg->Swizzle = RC_SWIZZLE_XYZW;
}
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
index 0326d252339..ced66af1eb5 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
@@ -560,23 +560,23 @@ static void sincos_constants(struct radeon_compiler* c, unsigned int *constants)
* MAD dest, tmp.y, weight, tmp.x
*/
static void sin_approx(
- struct radeon_compiler* c, struct rc_instruction * before,
+ struct radeon_compiler* c, struct rc_instruction * inst,
struct rc_dst_register dst, struct rc_src_register src, const unsigned int* constants)
{
unsigned int tempreg = rc_find_free_temporary(c);
- emit2(c, before, RC_OPCODE_MUL, 0, dstregtmpmask(tempreg, RC_MASK_XY),
+ emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dstregtmpmask(tempreg, RC_MASK_XY),
swizzle(src, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X),
srcreg(RC_FILE_CONSTANT, constants[0]));
- emit3(c, before, RC_OPCODE_MAD, 0, dstregtmpmask(tempreg, RC_MASK_X),
+ emit3(c, inst->Prev, RC_OPCODE_MAD, 0, dstregtmpmask(tempreg, RC_MASK_X),
swizzle(srcreg(RC_FILE_TEMPORARY, tempreg), RC_SWIZZLE_Y, RC_SWIZZLE_Y, RC_SWIZZLE_Y, RC_SWIZZLE_Y),
absolute(swizzle(src, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X)),
swizzle(srcreg(RC_FILE_TEMPORARY, tempreg), RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X));
- emit3(c, before, RC_OPCODE_MAD, 0, dstregtmpmask(tempreg, RC_MASK_Y),
+ emit3(c, inst->Prev, RC_OPCODE_MAD, 0, dstregtmpmask(tempreg, RC_MASK_Y),
swizzle(srcreg(RC_FILE_TEMPORARY, tempreg), RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X),
absolute(swizzle(srcreg(RC_FILE_TEMPORARY, tempreg), RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X)),
negate(swizzle(srcreg(RC_FILE_TEMPORARY, tempreg), RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X)));
- emit3(c, before, RC_OPCODE_MAD, 0, dst,
+ emit3(c, inst->Prev, RC_OPCODE_MAD, 0, dst,
swizzle(srcreg(RC_FILE_TEMPORARY, tempreg), RC_SWIZZLE_Y, RC_SWIZZLE_Y, RC_SWIZZLE_Y, RC_SWIZZLE_Y),
swizzle(srcreg(RC_FILE_CONSTANT, constants[0]), RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W),
swizzle(srcreg(RC_FILE_TEMPORARY, tempreg), RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X));
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 2a38c4599c6..71f70d724b9 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -262,7 +262,7 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
else
radeon->texture_row_align = 32;
radeon->texture_rect_row_align = 64;
- radeon->texture_compressed_row_align = 64;
+ radeon->texture_compressed_row_align = 32;
}
radeon_init_dma(radeon);
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 0497fa7db50..46603de2e76 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -37,26 +37,35 @@
#include "main/texobj.h"
#include "radeon_texture.h"
-static GLuint radeon_compressed_texture_size(GLcontext *ctx,
- GLsizei width, GLsizei height, GLsizei depth,
- gl_format mesaFormat)
+static unsigned get_aligned_compressed_row_stride(
+ gl_format format,
+ unsigned width,
+ unsigned minStride)
{
- GLuint size = _mesa_format_image_size(mesaFormat, width, height, depth);
-
- if (mesaFormat == MESA_FORMAT_RGB_DXT1 ||
- mesaFormat == MESA_FORMAT_RGBA_DXT1) {
- if (width + 3 < 8) /* width one block */
- size = size * 4;
- else if (width + 3 < 16)
- size = size * 2;
- } else {
- /* DXT3/5, 16 bytes per block */
- // WARN_ONCE("DXT 3/5 suffers from multitexturing problems!\n");
- if (width + 3 < 8)
- size = size * 2;
+ const unsigned blockSize = _mesa_get_format_bytes(format);
+ unsigned blockWidth, blockHeight, numXBlocks;
+
+ _mesa_get_format_block_size(format, &blockWidth, &blockHeight);
+ numXBlocks = (width + blockWidth - 1) / blockWidth;
+
+ while (numXBlocks * blockSize < minStride)
+ {
+ ++numXBlocks;
}
- return size;
+ return numXBlocks * blockSize;
+}
+
+static unsigned get_compressed_image_size(
+ gl_format format,
+ unsigned rowStride,
+ unsigned height)
+{
+ unsigned blockWidth, blockHeight;
+
+ _mesa_get_format_block_size(format, &blockWidth, &blockHeight);
+
+ return rowStride * ((height + blockHeight - 1) / blockHeight);
}
/**
@@ -74,10 +83,8 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
/* Find image size in bytes */
if (_mesa_is_format_compressed(mt->mesaFormat)) {
- /* TODO: Is this correct? Need test cases for compressed textures! */
- row_align = rmesa->texture_compressed_row_align - 1;
- lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
- lvl->size = radeon_compressed_texture_size(rmesa->glCtx, lvl->width, lvl->height, lvl->depth, mt->mesaFormat);
+ lvl->rowstride = get_aligned_compressed_row_stride(mt->mesaFormat, lvl->width, rmesa->texture_compressed_row_align);
+ lvl->size = get_compressed_image_size(mt->mesaFormat, lvl->rowstride, lvl->height);
} else if (mt->target == GL_TEXTURE_RECTANGLE_NV) {
row_align = rmesa->texture_rect_row_align - 1;
lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align;
@@ -485,11 +492,12 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
unsigned firstLevel,
unsigned lastLevel)
{
- const unsigned numLevels = lastLevel - firstLevel;
+ const unsigned numLevels = lastLevel - firstLevel + 1;
unsigned *mtSizes = calloc(numLevels, sizeof(unsigned));
radeon_mipmap_tree **mts = calloc(numLevels, sizeof(radeon_mipmap_tree *));
unsigned mtCount = 0;
unsigned maxMtIndex = 0;
+ radeon_mipmap_tree *tmp;
for (unsigned level = firstLevel; level <= lastLevel; ++level) {
radeon_texture_image *img = get_radeon_texture_image(texObj->base.Image[0][level]);
@@ -511,7 +519,7 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
if (!found) {
mtSizes[mtCount] += img->mt->levels[img->mtlevel].size;
- mts[mtCount++] = img->mt;
+ mts[mtCount] = img->mt;
mtCount++;
}
}
@@ -526,7 +534,11 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
}
}
- return mts[maxMtIndex];
+ tmp = mts[maxMtIndex];
+ free(mtSizes);
+ free(mts);
+
+ return tmp;
}
/**
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 6f11f1fa4ab..1ee9e2792a5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -582,12 +582,12 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
/* TODO */
assert(0);
} else {
- dstRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
+ dstRowStride = _mesa_format_row_stride(texImage->TexFormat, texImage->Width);
}
if (dims == 3) {
unsigned alignedWidth = dstRowStride/_mesa_get_format_bytes(texImage->TexFormat);
- dstImageOffsets = allocate_image_offsets(ctx, alignedWidth, height, depth);
+ dstImageOffsets = allocate_image_offsets(ctx, alignedWidth, texImage->Height, texImage->Depth);
if (!dstImageOffsets) {
return;
}
@@ -598,8 +598,11 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
radeon_teximage_map(image, GL_TRUE);
if (compressed) {
- uint32_t srcRowStride, bytesPerRow, rows;
+ uint32_t srcRowStride, bytesPerRow, rows, block_width, block_height;
GLubyte *img_start;
+
+ _mesa_get_format_block_size(texImage->TexFormat, &block_width, &block_height);
+
if (!image->mt) {
dstRowStride = _mesa_format_row_stride(texImage->TexFormat, texImage->Width);
img_start = _mesa_compressed_image_address(xoffset, yoffset, 0,
@@ -607,17 +610,16 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
texImage->Width, texImage->Data);
}
else {
- uint32_t blocks_x, block_width, block_height;
- _mesa_get_format_block_size(image->mt->mesaFormat, &block_width, &block_height);
- blocks_x = dstRowStride / block_width;
- img_start = texImage->Data + _mesa_get_format_bytes(image->mt->mesaFormat) * 4 * (blocks_x * (yoffset / 4) + xoffset / 4);
+ uint32_t offset;
+ offset = dstRowStride / _mesa_get_format_bytes(texImage->TexFormat) * yoffset / block_height + xoffset / block_width;
+ offset *= _mesa_get_format_bytes(texImage->TexFormat);
+ img_start = texImage->Data + offset;
}
srcRowStride = _mesa_format_row_stride(texImage->TexFormat, width);
bytesPerRow = srcRowStride;
- rows = (height + 3) / 4;
-
- copy_rows(img_start, dstRowStride, pixels, srcRowStride, rows, bytesPerRow);
+ rows = (height + block_height - 1) / block_height;
+ copy_rows(img_start, dstRowStride, pixels, srcRowStride, rows, bytesPerRow);
}
else {
if (!_mesa_texstore(ctx, dims, texImage->_BaseFormat,
diff --git a/src/mesa/main/texfetch.c b/src/mesa/main/texfetch.c
index f4f2be48c37..b37039429f4 100644
--- a/src/mesa/main/texfetch.c
+++ b/src/mesa/main/texfetch.c
@@ -570,7 +570,7 @@ texfetch_funcs[MESA_FORMAT_COUNT] =
static FetchTexelFuncF
_mesa_get_texel_fetch_func(gl_format format, GLuint dims)
{
- FetchTexelFuncF f;
+ FetchTexelFuncF f = NULL;
GLuint i;
/* XXX replace loop with direct table lookup */
for (i = 0; i < MESA_FORMAT_COUNT; i++) {
diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 2f88718933a..008407210d9 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -521,10 +521,11 @@ _mesa_get_compressed_teximage(GLcontext *ctx, GLenum target, GLint level,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage)
{
- const GLuint size = _mesa_format_image_size(texImage->TexFormat,
- texImage->Width,
- texImage->Height,
- texImage->Depth);
+ const GLuint row_stride = _mesa_format_row_stride(texImage->TexFormat,
+ texImage->Width);
+ const GLuint row_stride_stored = _mesa_format_row_stride(texImage->TexFormat,
+ texImage->RowStride);
+ GLuint i;
if (_mesa_is_bufferobj(ctx->Pack.BufferObj)) {
/* pack texture image into a PBO */
@@ -540,8 +541,22 @@ _mesa_get_compressed_teximage(GLcontext *ctx, GLenum target, GLint level,
img = ADD_POINTERS(buf, img);
}
- /* just memcpy, no pixelstore or pixel transfer */
- _mesa_memcpy(img, texImage->Data, size);
+ /* no pixelstore or pixel transfer, but respect stride */
+
+ if (row_stride == row_stride_stored) {
+ const GLuint size = _mesa_format_image_size(texImage->TexFormat,
+ texImage->Width,
+ texImage->Height,
+ texImage->Depth);
+ _mesa_memcpy(img, texImage->Data, size);
+ }
+ else {
+ GLuint bw, bh;
+ _mesa_get_format_block_size(texImage->TexFormat, &bw, &bh);
+ for (i = 0; i < (texImage->Height + bh - 1) / bh; i++) {
+ memcpy(img + i * row_stride, texImage->Data + i * row_stride_stored, row_stride);
+ }
+ }
if (_mesa_is_bufferobj(ctx->Pack.BufferObj)) {
ctx->Driver.UnmapBuffer(ctx, GL_PIXEL_PACK_BUFFER_EXT,
diff --git a/src/mesa/shader/prog_optimize.c b/src/mesa/shader/prog_optimize.c
index 3d28d885a44..4fe351251e8 100644
--- a/src/mesa/shader/prog_optimize.c
+++ b/src/mesa/shader/prog_optimize.c
@@ -443,7 +443,7 @@ _mesa_remove_extra_move_use(struct gl_program *prog)
* FOO tmpY, arg0, arg1;
*/
- for (i = 0; i < prog->NumInstructions - 1; i++) {
+ for (i = 0; i + 1 < prog->NumInstructions; i++) {
const struct prog_instruction *mov = prog->Instructions + i;
if (mov->Opcode != OPCODE_MOV ||
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 18:58:47 +0000