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-rw-r--r--src/compiler/nir/nir.h2
-rw-r--r--src/compiler/nir/nir_builder.h2
-rw-r--r--src/compiler/nir/nir_from_ssa.c8
-rw-r--r--src/compiler/nir/nir_gather_ssa_types.c3
-rw-r--r--src/compiler/nir/nir_lower_bool_to_float.c5
-rw-r--r--src/compiler/nir/nir_lower_bool_to_int32.c2
-rw-r--r--src/compiler/nir/nir_lower_int_to_float.c9
-rw-r--r--src/compiler/nir/nir_lower_locals_to_regs.c4
-rw-r--r--src/compiler/nir/nir_lower_phis_to_scalar.c2
-rw-r--r--src/compiler/nir/nir_lower_to_source_mods.c2
-rw-r--r--src/compiler/nir/nir_lower_vars_to_ssa.c2
-rw-r--r--src/compiler/nir/nir_lower_vec_to_movs.c2
-rw-r--r--src/compiler/nir/nir_opcodes.py5
-rw-r--r--src/compiler/nir/nir_opcodes_c.py6
-rw-r--r--src/compiler/nir/nir_opt_comparison_pre.c4
-rw-r--r--src/compiler/nir/nir_opt_copy_propagate.c6
-rw-r--r--src/compiler/nir/nir_opt_if.c7
-rw-r--r--src/compiler/nir/nir_opt_peephole_select.c3
-rw-r--r--src/compiler/nir/nir_opt_remove_phis.c2
-rw-r--r--src/compiler/nir/nir_opt_undef.c5
-rw-r--r--src/compiler/nir/nir_split_vars.c3
-rw-r--r--src/compiler/nir/nir_validate.c4
22 files changed, 38 insertions, 50 deletions
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 7e51501e913..15323f9a0c7 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -866,7 +866,7 @@ static inline nir_op
nir_op_vec(unsigned components)
{
switch (components) {
- case 1: return nir_op_imov;
+ case 1: return nir_op_mov;
case 2: return nir_op_vec2;
case 3: return nir_op_vec3;
case 4: return nir_op_vec4;
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index e14151ab7b5..dbbc7e41039 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -496,7 +496,7 @@ static inline nir_ssa_def *
nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
{
assert(!src.abs && !src.negate);
- nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
nir_src_bit_size(src.src), NULL);
mov->exact = build->exact;
diff --git a/src/compiler/nir/nir_from_ssa.c b/src/compiler/nir/nir_from_ssa.c
index 92effe56101..b406e7401d6 100644
--- a/src/compiler/nir/nir_from_ssa.c
+++ b/src/compiler/nir/nir_from_ssa.c
@@ -551,7 +551,7 @@ emit_copy(nir_builder *b, nir_src src, nir_src dest_src)
else
assert(src.reg.reg->num_components >= dest_src.reg.reg->num_components);
- nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
nir_src_copy(&mov->src[0].src, &src, mov);
mov->dest.dest = nir_dest_for_reg(dest_src.reg.reg);
mov->dest.write_mask = (1 << dest_src.reg.reg->num_components) - 1;
@@ -852,7 +852,7 @@ place_phi_read(nir_shader *shader, nir_register *reg,
}
}
- nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
mov->src[0].src = nir_src_for_ssa(def);
mov->dest.dest = nir_dest_for_reg(reg);
mov->dest.write_mask = (1 << reg->num_components) - 1;
@@ -889,7 +889,7 @@ nir_lower_phis_to_regs_block(nir_block *block)
nir_register *reg = create_reg_for_ssa_def(&phi->dest.ssa, impl);
- nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
mov->src[0].src = nir_src_for_reg(reg);
mov->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
nir_ssa_dest_init(&mov->instr, &mov->dest.dest,
@@ -989,7 +989,7 @@ nir_lower_ssa_defs_to_regs_block(nir_block *block)
nir_register *reg = create_reg_for_ssa_def(&load->def, state.impl);
nir_ssa_def_rewrite_uses(&load->def, nir_src_for_reg(reg));
- nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
mov->src[0].src = nir_src_for_ssa(&load->def);
mov->dest.dest = nir_dest_for_reg(reg);
mov->dest.write_mask = (1 << reg->num_components) - 1;
diff --git a/src/compiler/nir/nir_gather_ssa_types.c b/src/compiler/nir/nir_gather_ssa_types.c
index 73bd0f9bc6a..fa648fe3326 100644
--- a/src/compiler/nir/nir_gather_ssa_types.c
+++ b/src/compiler/nir/nir_gather_ssa_types.c
@@ -102,8 +102,7 @@ nir_gather_ssa_types(nir_function_impl *impl,
assert(alu->dest.dest.is_ssa);
const nir_op_info *info = &nir_op_infos[alu->op];
switch (alu->op) {
- case nir_op_imov:
- case nir_op_fmov:
+ case nir_op_mov:
case nir_op_vec2:
case nir_op_vec3:
case nir_op_vec4:
diff --git a/src/compiler/nir/nir_lower_bool_to_float.c b/src/compiler/nir/nir_lower_bool_to_float.c
index 68fb650b4be..c48b800a365 100644
--- a/src/compiler/nir/nir_lower_bool_to_float.c
+++ b/src/compiler/nir/nir_lower_bool_to_float.c
@@ -58,8 +58,8 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
/* These we expect to have booleans but the opcode doesn't change */
break;
- case nir_op_b2f32: alu->op = nir_op_fmov; break;
- case nir_op_b2i32: alu->op = nir_op_fmov; break;
+ case nir_op_b2f32: alu->op = nir_op_mov; break;
+ case nir_op_b2i32: alu->op = nir_op_mov; break;
case nir_op_f2b1:
case nir_op_i2b1:
rep = nir_sne(b, nir_ssa_for_alu_src(b, alu, 0),
@@ -92,7 +92,6 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
case nir_op_bcsel: alu->op = nir_op_fcsel; break;
- case nir_op_imov: alu->op = nir_op_fmov; break;
case nir_op_iand: alu->op = nir_op_fmul; break;
case nir_op_ixor: alu->op = nir_op_sne; break;
case nir_op_ior: alu->op = nir_op_fmax; break;
diff --git a/src/compiler/nir/nir_lower_bool_to_int32.c b/src/compiler/nir/nir_lower_bool_to_int32.c
index c8f040c6178..e331de488a3 100644
--- a/src/compiler/nir/nir_lower_bool_to_int32.c
+++ b/src/compiler/nir/nir_lower_bool_to_int32.c
@@ -49,7 +49,7 @@ lower_alu_instr(nir_alu_instr *alu)
assert(alu->dest.dest.is_ssa);
switch (alu->op) {
- case nir_op_imov:
+ case nir_op_mov:
case nir_op_vec2:
case nir_op_vec3:
case nir_op_vec4:
diff --git a/src/compiler/nir/nir_lower_int_to_float.c b/src/compiler/nir/nir_lower_int_to_float.c
index 439afa0cdbd..e31644d8cf7 100644
--- a/src/compiler/nir/nir_lower_int_to_float.c
+++ b/src/compiler/nir/nir_lower_int_to_float.c
@@ -60,10 +60,10 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
/* These we expect to have integers or booleans but the opcode doesn't change */
break;
- case nir_op_b2f32: alu->op = nir_op_fmov; break;
- case nir_op_b2i32: alu->op = nir_op_fmov; break;
- case nir_op_i2f32: alu->op = nir_op_fmov; break;
- case nir_op_f2i32: alu->op = nir_op_fmov; break;
+ case nir_op_b2f32: alu->op = nir_op_mov; break;
+ case nir_op_b2i32: alu->op = nir_op_mov; break;
+ case nir_op_i2f32: alu->op = nir_op_mov; break;
+ case nir_op_f2i32: alu->op = nir_op_mov; break;
case nir_op_f2i1:
case nir_op_f2b1:
case nir_op_i2b1:
@@ -101,7 +101,6 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
case nir_op_iadd: alu->op = nir_op_fadd; break;
case nir_op_isub: alu->op = nir_op_fsub; break;
case nir_op_imul: alu->op = nir_op_fmul; break;
- case nir_op_imov: alu->op = nir_op_fmov; break;
case nir_op_iand: alu->op = nir_op_fmul; break;
case nir_op_ixor: alu->op = nir_op_sne; break;
case nir_op_ior: alu->op = nir_op_fmax; break;
diff --git a/src/compiler/nir/nir_lower_locals_to_regs.c b/src/compiler/nir/nir_lower_locals_to_regs.c
index 0316c8aead8..37e17d5b980 100644
--- a/src/compiler/nir/nir_lower_locals_to_regs.c
+++ b/src/compiler/nir/nir_lower_locals_to_regs.c
@@ -197,7 +197,7 @@ lower_locals_to_regs_block(nir_block *block,
b->cursor = nir_before_instr(&intrin->instr);
- nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
mov->src[0].src = get_deref_reg_src(deref, state);
mov->dest.write_mask = (1 << intrin->num_components) - 1;
if (intrin->dest.is_ssa) {
@@ -225,7 +225,7 @@ lower_locals_to_regs_block(nir_block *block,
nir_src reg_src = get_deref_reg_src(deref, state);
- nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
nir_src_copy(&mov->src[0].src, &intrin->src[1], mov);
mov->dest.write_mask = nir_intrinsic_write_mask(intrin);
mov->dest.dest.is_ssa = false;
diff --git a/src/compiler/nir/nir_lower_phis_to_scalar.c b/src/compiler/nir/nir_lower_phis_to_scalar.c
index c58a67826ce..bea9dc40753 100644
--- a/src/compiler/nir/nir_lower_phis_to_scalar.c
+++ b/src/compiler/nir/nir_lower_phis_to_scalar.c
@@ -235,7 +235,7 @@ lower_phis_to_scalar_block(nir_block *block,
nir_foreach_phi_src(src, phi) {
/* We need to insert a mov to grab the i'th component of src */
nir_alu_instr *mov = nir_alu_instr_create(state->mem_ctx,
- nir_op_imov);
+ nir_op_mov);
nir_ssa_dest_init(&mov->instr, &mov->dest.dest, 1, bit_size, NULL);
mov->dest.write_mask = 1;
nir_src_copy(&mov->src[0].src, &src->src, state->mem_ctx);
diff --git a/src/compiler/nir/nir_lower_to_source_mods.c b/src/compiler/nir/nir_lower_to_source_mods.c
index 63ef4043fe2..c4ba604b32e 100644
--- a/src/compiler/nir/nir_lower_to_source_mods.c
+++ b/src/compiler/nir/nir_lower_to_source_mods.c
@@ -178,7 +178,7 @@ nir_lower_to_source_mods_block(nir_block *block,
assert(child_src->is_ssa);
nir_alu_instr *child_alu = nir_instr_as_alu(child_src->parent_instr);
- child_alu->op = nir_op_fmov;
+ child_alu->op = nir_op_mov;
child_alu->dest.saturate = false;
/* We could propagate the dest of our instruction to the
* destinations of the uses here. However, one quick round of
diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c b/src/compiler/nir/nir_lower_vars_to_ssa.c
index 8239eb069c5..8771910f7e5 100644
--- a/src/compiler/nir/nir_lower_vars_to_ssa.c
+++ b/src/compiler/nir/nir_lower_vars_to_ssa.c
@@ -531,7 +531,7 @@ rename_variables(struct lower_variables_state *state)
continue;
nir_alu_instr *mov = nir_alu_instr_create(state->shader,
- nir_op_imov);
+ nir_op_mov);
mov->src[0].src = nir_src_for_ssa(
nir_phi_builder_value_get_block_def(node->pb_value, block));
for (unsigned i = intrin->num_components; i < NIR_MAX_VEC_COMPONENTS; i++)
diff --git a/src/compiler/nir/nir_lower_vec_to_movs.c b/src/compiler/nir/nir_lower_vec_to_movs.c
index 8b24376b0a5..8c286117d55 100644
--- a/src/compiler/nir/nir_lower_vec_to_movs.c
+++ b/src/compiler/nir/nir_lower_vec_to_movs.c
@@ -57,7 +57,7 @@ insert_mov(nir_alu_instr *vec, unsigned start_idx, nir_shader *shader)
{
assert(start_idx < nir_op_infos[vec->op].num_inputs);
- nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov);
+ nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
nir_alu_src_copy(&mov->src[0], &vec->src[start_idx], mov);
nir_alu_dest_copy(&mov->dest, &vec->dest, mov);
diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 3ea25f31d4a..f6fa462cd13 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -185,10 +185,7 @@ def unop_reduce(name, output_size, output_type, input_type, prereduce_expr,
def unop_numeric_convert(name, out_type, in_type, const_expr):
opcode(name, 0, out_type, [0], [in_type], True, "", const_expr)
-# These two move instructions differ in what modifiers they support and what
-# the negate modifier means. Otherwise, they are identical.
-unop("fmov", tfloat, "src0")
-unop("imov", tint, "src0")
+unop("mov", tuint, "src0")
unop("ineg", tint, "-src0")
unop("fneg", tfloat, "-src0")
diff --git a/src/compiler/nir/nir_opcodes_c.py b/src/compiler/nir/nir_opcodes_c.py
index 96c71a1b2c5..c6e5bb39ddd 100644
--- a/src/compiler/nir/nir_opcodes_c.py
+++ b/src/compiler/nir/nir_opcodes_c.py
@@ -40,16 +40,16 @@ nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd
unsigned dst_bit_size = nir_alu_type_get_type_size(dst);
if (src == dst && src_base == nir_type_float) {
- return nir_op_fmov;
+ return nir_op_mov;
} else if (src == dst && src_base == nir_type_bool) {
- return nir_op_imov;
+ return nir_op_mov;
} else if ((src_base == nir_type_int || src_base == nir_type_uint) &&
(dst_base == nir_type_int || dst_base == nir_type_uint) &&
src_bit_size == dst_bit_size) {
/* Integer <-> integer conversions with the same bit-size on both
* ends are just no-op moves.
*/
- return nir_op_imov;
+ return nir_op_mov;
}
switch (src_base) {
diff --git a/src/compiler/nir/nir_opt_comparison_pre.c b/src/compiler/nir/nir_opt_comparison_pre.c
index eee496251a7..221379b3a23 100644
--- a/src/compiler/nir/nir_opt_comparison_pre.c
+++ b/src/compiler/nir/nir_opt_comparison_pre.c
@@ -172,7 +172,7 @@ rewrite_compare_instruction(nir_builder *bld, nir_alu_instr *orig_cmp,
* will clean these up. This is similar to nir_replace_instr (in
* nir_search.c).
*/
- nir_alu_instr *mov_add = nir_alu_instr_create(mem_ctx, nir_op_imov);
+ nir_alu_instr *mov_add = nir_alu_instr_create(mem_ctx, nir_op_mov);
mov_add->dest.write_mask = orig_add->dest.write_mask;
nir_ssa_dest_init(&mov_add->instr, &mov_add->dest.dest,
orig_add->dest.dest.ssa.num_components,
@@ -181,7 +181,7 @@ rewrite_compare_instruction(nir_builder *bld, nir_alu_instr *orig_cmp,
nir_builder_instr_insert(bld, &mov_add->instr);
- nir_alu_instr *mov_cmp = nir_alu_instr_create(mem_ctx, nir_op_imov);
+ nir_alu_instr *mov_cmp = nir_alu_instr_create(mem_ctx, nir_op_mov);
mov_cmp->dest.write_mask = orig_cmp->dest.write_mask;
nir_ssa_dest_init(&mov_cmp->instr, &mov_cmp->dest.dest,
orig_cmp->dest.dest.ssa.num_components,
diff --git a/src/compiler/nir/nir_opt_copy_propagate.c b/src/compiler/nir/nir_opt_copy_propagate.c
index 909839ad962..0961d6bbf29 100644
--- a/src/compiler/nir/nir_opt_copy_propagate.c
+++ b/src/compiler/nir/nir_opt_copy_propagate.c
@@ -36,8 +36,7 @@ static bool is_move(nir_alu_instr *instr)
{
assert(instr->src[0].src.is_ssa);
- if (instr->op != nir_op_fmov &&
- instr->op != nir_op_imov)
+ if (instr->op != nir_op_mov)
return false;
if (instr->dest.saturate)
@@ -144,8 +143,7 @@ copy_prop_alu_src(nir_alu_instr *parent_alu_instr, unsigned index)
nir_ssa_def *def;
unsigned new_swizzle[NIR_MAX_VEC_COMPONENTS] = {0, 0, 0, 0};
- if (alu_instr->op == nir_op_fmov ||
- alu_instr->op == nir_op_imov) {
+ if (alu_instr->op == nir_op_mov) {
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
new_swizzle[i] = alu_instr->src[0].swizzle[src->swizzle[i]];
def = alu_instr->src[0].src.ssa;
diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c
index f674185f1e2..6d488bd76a3 100644
--- a/src/compiler/nir/nir_opt_if.c
+++ b/src/compiler/nir/nir_opt_if.c
@@ -400,8 +400,8 @@ opt_split_alu_of_phi(nir_builder *b, nir_loop *loop)
* should be one of the other two operands, so the result of the bcsel
* should never be replaced with undef.
*
- * nir_op_vec{2,3,4}, nir_op_imov, and nir_op_fmov are excluded because
- * they can easily lead to infinite optimization loops.
+ * nir_op_vec{2,3,4} and nir_op_mov are excluded because they can easily
+ * lead to infinite optimization loops.
*/
if (alu->op == nir_op_bcsel ||
alu->op == nir_op_b32csel ||
@@ -409,8 +409,7 @@ opt_split_alu_of_phi(nir_builder *b, nir_loop *loop)
alu->op == nir_op_vec2 ||
alu->op == nir_op_vec3 ||
alu->op == nir_op_vec4 ||
- alu->op == nir_op_imov ||
- alu->op == nir_op_fmov ||
+ alu->op == nir_op_mov ||
alu_instr_is_comparison(alu) ||
alu_instr_is_type_conversion(alu))
continue;
diff --git a/src/compiler/nir/nir_opt_peephole_select.c b/src/compiler/nir/nir_opt_peephole_select.c
index a4020c83aca..09ae3d5632f 100644
--- a/src/compiler/nir/nir_opt_peephole_select.c
+++ b/src/compiler/nir/nir_opt_peephole_select.c
@@ -108,8 +108,7 @@ block_check_for_allowed_instrs(nir_block *block, unsigned *count,
case nir_instr_type_alu: {
nir_alu_instr *mov = nir_instr_as_alu(instr);
switch (mov->op) {
- case nir_op_fmov:
- case nir_op_imov:
+ case nir_op_mov:
case nir_op_fneg:
case nir_op_ineg:
case nir_op_fabs:
diff --git a/src/compiler/nir/nir_opt_remove_phis.c b/src/compiler/nir/nir_opt_remove_phis.c
index 3643112d976..dd557396ec1 100644
--- a/src/compiler/nir/nir_opt_remove_phis.c
+++ b/src/compiler/nir/nir_opt_remove_phis.c
@@ -35,7 +35,7 @@ get_parent_mov(nir_ssa_def *ssa)
return NULL;
nir_alu_instr *alu = nir_instr_as_alu(ssa->parent_instr);
- return (alu->op == nir_op_imov || alu->op == nir_op_fmov) ? alu : NULL;
+ return (alu->op == nir_op_mov) ? alu : NULL;
}
static bool
diff --git a/src/compiler/nir/nir_opt_undef.c b/src/compiler/nir/nir_opt_undef.c
index bdebf5540d6..1f939e82c68 100644
--- a/src/compiler/nir/nir_opt_undef.c
+++ b/src/compiler/nir/nir_opt_undef.c
@@ -63,7 +63,7 @@ opt_undef_csel(nir_alu_instr *instr)
memset(&empty_src, 0, sizeof(empty_src));
nir_instr_rewrite_src(&instr->instr, &instr->src[1].src, empty_src);
nir_instr_rewrite_src(&instr->instr, &instr->src[2].src, empty_src);
- instr->op = nir_op_imov;
+ instr->op = nir_op_mov;
return true;
}
@@ -80,8 +80,7 @@ opt_undef_vecN(nir_builder *b, nir_alu_instr *alu)
if (alu->op != nir_op_vec2 &&
alu->op != nir_op_vec3 &&
alu->op != nir_op_vec4 &&
- alu->op != nir_op_fmov &&
- alu->op != nir_op_imov)
+ alu->op != nir_op_mov)
return false;
assert(alu->dest.dest.is_ssa);
diff --git a/src/compiler/nir/nir_split_vars.c b/src/compiler/nir/nir_split_vars.c
index 62f322236e3..2ff82570203 100644
--- a/src/compiler/nir/nir_split_vars.c
+++ b/src/compiler/nir/nir_split_vars.c
@@ -1062,8 +1062,7 @@ get_non_self_referential_store_comps(nir_intrinsic_instr *store)
nir_alu_instr *src_alu = nir_instr_as_alu(src_instr);
- if (src_alu->op == nir_op_imov ||
- src_alu->op == nir_op_fmov) {
+ if (src_alu->op == nir_op_mov) {
/* If it's just a swizzle of a load from the same deref, discount any
* channels that don't move in the swizzle.
*/
diff --git a/src/compiler/nir/nir_validate.c b/src/compiler/nir/nir_validate.c
index 30c4a9f5c62..bf3f23f2547 100644
--- a/src/compiler/nir/nir_validate.c
+++ b/src/compiler/nir/nir_validate.c
@@ -217,7 +217,7 @@ validate_alu_src(nir_alu_instr *instr, unsigned index, validate_state *state)
{
nir_alu_src *src = &instr->src[index];
- if (instr->op == nir_op_fmov || instr->op == nir_op_imov)
+ if (instr->op == nir_op_mov)
assert(!src->abs && !src->negate);
unsigned num_components = nir_src_num_components(src->src);
@@ -322,7 +322,7 @@ validate_alu_dest(nir_alu_instr *instr, validate_state *state)
{
nir_alu_dest *dest = &instr->dest;
- if (instr->op == nir_op_fmov || instr->op == nir_op_imov)
+ if (instr->op == nir_op_mov)
assert(!dest->saturate);
unsigned dest_size = nir_dest_num_components(dest->dest);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 18:29:18 +0000