diff options
| -rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 0c13860fe28..1b77bd70eec 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -3125,7 +3125,6 @@ static void handle_ngg_outputs_post(struct radv_shader_context *ctx) { LLVMBuilderRef builder = ctx->ac.builder; - unsigned num_vertices = 3; LLVMValueRef tmp; assert((ctx->stage == MESA_SHADER_VERTEX || @@ -3143,6 +3142,22 @@ handle_ngg_outputs_post(struct radv_shader_context *ctx) ac_unpack_param(&ctx->ac, ctx->gs_vtx_offset[2], 0, 16), }; + /* Determine the number of vertices per primitive. */ + unsigned num_vertices; + + if (ctx->stage == MESA_SHADER_VERTEX) { + num_vertices = 3; /* TODO: optimize for points & lines */ + } else { + assert(ctx->stage == MESA_SHADER_TESS_EVAL); + + if (ctx->shader->info.tess.point_mode) + num_vertices = 1; + else if (ctx->shader->info.tess.primitive_mode == GL_ISOLINES) + num_vertices = 2; + else + num_vertices = 3; + } + /* TODO: streamout */ /* Copy Primitive IDs from GS threads to the LDS address corresponding |