aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/r600/r600_tex.c
diff options
context:
space:
mode:
authorMaciej Cencora <[email protected]>2009-11-18 22:02:48 +0100
committerMaciej Cencora <[email protected]>2009-11-18 22:02:48 +0100
commit7118db870091d4c9c2465e79f361ff0ed36d1f90 (patch)
tree0e2be36fd28c5d7f2f84cf11b135bc0404f6dabb /src/mesa/drivers/dri/r600/r600_tex.c
parentafe84fa698eae3e035e967589f0a8d55f6a83698 (diff)
r600: align for mipmap tree changes
Diffstat (limited to 'src/mesa/drivers/dri/r600/r600_tex.c')
-rw-r--r--src/mesa/drivers/dri/r600/r600_tex.c17
1 files changed, 3 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_tex.c b/src/mesa/drivers/dri/r600/r600_tex.c
index 20965bb3c84..9d83a64e220 100644
--- a/src/mesa/drivers/dri/r600/r600_tex.c
+++ b/src/mesa/drivers/dri/r600/r600_tex.c
@@ -312,16 +312,7 @@ static void r600TexParameter(GLcontext * ctx, GLenum target,
case GL_TEXTURE_MAX_LEVEL:
case GL_TEXTURE_MIN_LOD:
case GL_TEXTURE_MAX_LOD:
- /* This isn't the most efficient solution but there doesn't appear to
- * be a nice alternative. Since there's no LOD clamping,
- * we just have to rely on loading the right subset of mipmap levels
- * to simulate a clamped LOD.
- */
- if (t->mt) {
- radeon_miptree_unreference(t->mt);
- t->mt = 0;
- t->validated = GL_FALSE;
- }
+ t->validated = GL_FALSE;
break;
case GL_DEPTH_TEXTURE_MODE:
@@ -369,10 +360,8 @@ static void r600DeleteTexture(GLcontext * ctx, struct gl_texture_object *texObj)
t->bo = NULL;
}
- if (t->mt) {
- radeon_miptree_unreference(t->mt);
- t->mt = 0;
- }
+ radeon_miptree_unreference(&t->mt);
+
_mesa_delete_texture_object(ctx, texObj);
}