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authorBen Skeggs <[email protected]>2008-11-10 15:53:51 +1100
committerBen Skeggs <[email protected]>2008-11-10 15:53:51 +1100
commit32e6be6362e44609d36c2fb20a4c858f57c908fb (patch)
tree4ed99e93ef5f4a8bb51653917c911e04e42f5235 /src/mesa/drivers/dri/i965/brw_vs_emit.c
parent92674bc8889e10e580c630cf85c106fa6eb34d7b (diff)
parent399da3a337932c6074a69ac73e711138271308eb (diff)
Merge remote branch 'origin/gallium-0.2' into gallium-0.2
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs_emit.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 9de05408ba9..25b4ee85cb0 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -818,8 +818,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
}
- /* Build ndc coords? TODO: Shortcircuit when w is known to be one.
- */
+ /* Build ndc coords */
if (!c->key.know_w_is_one) {
ndc = get_tmp(c);
emit_math1(c, BRW_MATH_FUNCTION_INV, ndc, brw_swizzle1(pos, 3), BRW_MATH_PRECISION_FULL);
@@ -829,12 +828,12 @@ static void emit_vertex_write( struct brw_vs_compile *c)
ndc = pos;
}
- /* This includes the workaround for -ve rhw, so is no longer an
- * optional step:
+ /* Update the header for point size, user clipping flags, and -ve rhw
+ * workaround.
*/
if ((c->prog_data.outputs_written & (1<<VERT_RESULT_PSIZ)) ||
c->key.nr_userclip ||
- !c->key.know_w_is_one)
+ (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one))
{
struct brw_reg header1 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
GLuint i;
@@ -867,7 +866,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
* Later, clipping will detect ucp[6] and ensure the primitive is
* clipped against all fixed planes.
*/
- if (!(BRW_IS_GM45(p->brw) || BRW_IS_G4X(p->brw)) && !c->key.know_w_is_one) {
+ if (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one) {
brw_CMP(p,
vec8(brw_null_reg()),
BRW_CONDITIONAL_L,