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authorKenneth Graunke <[email protected]>2015-03-11 21:18:42 -0700
committerKenneth Graunke <[email protected]>2015-06-01 12:45:40 -0700
commit0f8ec779ddff4126837a7d4216ecf1d4b97e93d2 (patch)
tree28f425c12751bb3008cf45eb6d2cf1afd2f3710b /src/mesa/drivers/dri/i965/brw_vec4.cpp
parent9945573d65f4f66d127df7cbb62648889d09a7ed (diff)
i965: Create a shader_dispatch_mode enum to replace VS/GS fields.
We used to store the GS dispatch mode in brw_gs_prog_data while separately storing the VS dispatch mode in brw_vue_prog_data::simd8. This patch introduces an enum to represent all possible dispatch modes, and stores it in brw_vue_prog_data::dispatch_mode, unifying the two. Based on a suggestion by Matt Turner. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index a324798e060..5a9c3f53218 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1894,6 +1894,8 @@ brw_vs_emit(struct brw_context *brw,
brw_create_nir(brw, NULL, &c->vp->program.Base, MESA_SHADER_VERTEX);
}
+ prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
+
fs_visitor v(brw, mem_ctx, MESA_SHADER_VERTEX, &c->key,
&prog_data->base.base, prog, &c->vp->program.Base, 8);
if (!v.run_vs()) {
@@ -1926,11 +1928,12 @@ brw_vs_emit(struct brw_context *brw,
g.generate_code(v.cfg, 8);
assembly = g.get_assembly(final_assembly_size);
- prog_data->base.simd8 = true;
c->base.last_scratch = v.last_scratch;
}
if (!assembly) {
+ prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
+
vec4_vs_visitor v(brw, c, prog_data, prog, mem_ctx);
if (!v.run()) {
if (prog) {