diff options
| author | Paul Berry <[email protected]> | 2011-12-07 09:56:42 -0800 |
|---|---|---|
| committer | Paul Berry <[email protected]> | 2011-12-07 16:38:01 -0800 |
| commit | 43e39b58c705714c01919e5b4b5566e82e803d58 (patch) | |
| tree | e1785b9b2304f35e45f0499225afcf6d30ace256 /src/mesa/drivers/dri/i965/brw_context.c | |
| parent | 7a63a311e56fd492823b4b44e526df5a8dc0a021 (diff) | |
i965 gen6: Allocate URB space for GS
When the GS is not in use, the entire URB space is available for the
VS. When the GS is in use, we split the URB space 50/50.
The 50/50 split is probably not optimal--we'll probably want tune this
for performance in a future patch. For example, in most situations,
it's probably worth allocating more than 50% of the space to the VS,
since VS space is used for vertex caching. But for now this is good
enough.
Based on previous work by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index f97164991f7..faa02bf8a38 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -293,6 +293,7 @@ brwCreateContext(int api, brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */ brw->urb.max_gs_entries = 256; } + brw->urb.gen6_gs_previously_active = false; } else if (intel->gen == 5) { brw->urb.size = 1024; brw->max_vs_threads = 72; |