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authorLionel Landwerlin <[email protected]>2020-01-13 15:11:25 +0200
committerLionel Landwerlin <[email protected]>2020-01-26 22:27:03 +0200
commit397ff2976ba281a7d599b6246b7f6311011eaa0c (patch)
treedafd6b5cdf8fd78f906c2128b1c32c12ab000311 /src/intel/compiler/brw_nir.h
parent4d03e5312732c1ad48cc116b03573b7156fdb5da (diff)
intel: Implement Gen12 workaround for array textures of size 1
Gen12 does not support RENDER_SURFACE_STATE::SurfaceArray = true && RENDER_SURFACE_STATE::Depth = 0. SurfaceArray can only be set to true if Depth >= 1. We workaround this limitation by adding the max(value, 1) snippet in the shaders on the 3 components for texture array sizes. Tested on Gen9 with the following Vulkan CTS tests : dEQP-VK.image.image_size.2d_array.* v2: Drop debug print (Tapani) Switch to GEN:BUG instead of Wa_ v3: Fix dEQP-VK.image.image_size.1d_array.* cases (Lionel) v4: Fix dEQP-VK.glsl.texture_functions.query.texturesize.* cases (Missing tex_op handling) (Lionel) v5: Missing break statement (Lionel) v6: Fixup comment (Tapani) v7: Fixup comment again (Tapani) v8: Don't use sample_dim as index (Jason) Rename pass Simplify control flow Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> (v7) Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3362> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3362>
Diffstat (limited to 'src/intel/compiler/brw_nir.h')
-rw-r--r--src/intel/compiler/brw_nir.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index 7c7f1ea11b7..32a8badaa24 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -134,6 +134,8 @@ void brw_postprocess_nir(nir_shader *nir,
const struct brw_compiler *compiler,
bool is_scalar);
+bool brw_nir_clamp_image_1d_2d_array_sizes(nir_shader *shader);
+
bool brw_nir_apply_attribute_workarounds(nir_shader *nir,
const uint8_t *attrib_wa_flags);