diff options
author | Tim Rowley <[email protected]> | 2016-06-14 12:57:31 -0600 |
---|---|---|
committer | Tim Rowley <[email protected]> | 2016-06-23 10:51:00 -0500 |
commit | dd189536dc012dc793e9aa666514106cb6d93914 (patch) | |
tree | 1a5dbbbf4e46e7f66b3ceca71601d7e0809f9eb4 /src/gallium | |
parent | 35935ca4f2b204c497cc416f7ff82250235ccd9a (diff) |
swr: [rasterizer jitter] add support for component packing for 'odd' formats
Add early-out if no components are enabled. Add asserts.
Reviewed-by: Bruce Cherniak <[email protected]>
Diffstat (limited to 'src/gallium')
-rw-r--r-- | src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp index bc471a50383..fd4bf151d5f 100644 --- a/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp +++ b/src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp @@ -269,6 +269,9 @@ void FetchJit::JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* fet uint32_t numComponents = info.numComps; uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix. + // load path doesn't support component packing + SWR_ASSERT(ied.ComponentPacking == ComponentEnable::XYZW, "Fetch load path doesn't support component packing."); + vectors.clear(); Value *vCurIndices; @@ -699,6 +702,13 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* f for(uint32_t nInputElt = 0; nInputElt < fetchState.numAttribs; ++nInputElt) { const INPUT_ELEMENT_DESC& ied = fetchState.layout[nInputElt]; + + // skip element if all components are disabled + if (ied.ComponentPacking == ComponentEnable::NONE) + { + continue; + } + const SWR_FORMAT_INFO &info = GetFormatInfo((SWR_FORMAT)ied.Format); SWR_ASSERT((info.bpp != 0), "Unsupported format in JitGatherVertices."); uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix. @@ -789,14 +799,23 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* f // Special gather/conversion for formats without equal component sizes if (IsOddFormat((SWR_FORMAT)ied.Format)) { - // Only full 4 component fetch is supported for odd formats - SWR_ASSERT(compMask == XYZW); Value* pResults[4]; CreateGatherOddFormats((SWR_FORMAT)ied.Format, pStreamBase, vOffsets, pResults); ConvertFormat((SWR_FORMAT)ied.Format, pResults); - StoreVertexElements(pVtxOut, outputElt++, 4, pResults); - currentVertexElement = 0; + for (uint32_t c = 0; c < 4; ++c) + { + if (isComponentEnabled(compMask, c)) + { + vVertexElements[currentVertexElement++] = pResults[c]; + if (currentVertexElement > 3) + { + StoreVertexElements(pVtxOut, outputElt++, 4, vVertexElements); + // reset to the next vVertexElement to output + currentVertexElement = 0; + } + } + } } else if(info.type[0] == SWR_TYPE_FLOAT) { |