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authorNicolai Hähnle <[email protected]>2018-07-02 18:50:48 +0200
committerMarek Olšák <[email protected]>2019-07-03 15:51:13 -0400
commit1666ee183e2dd0ae78cbec236315ad6328692589 (patch)
tree2390a9a50a316c490de7d56448c62a75088174b3 /src/gallium/drivers/radeonsi/si_blit.c
parent69c41fb8ff97bf31196a834e3e4086ae8247a9ff (diff)
radeonsi/gfx10: implement hardware MSAA resolve
MSAA is only supported for 64KB_{R,Z}_X modes, so the micro tile optimization that we use on gfx9 and earlier does not work. Be very explicit about how the swizzle mode of the temporary surface is selected. Acked-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_blit.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_blit.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 638f2ee4d24..9c6e3bc2c54 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -1109,6 +1109,12 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
/* The next fast clear will switch to this mode to
* get direct hw resolve next time if the mode is
* different now.
+ *
+ * TODO-GFX10: This does not work in GFX10 because MSAA
+ * is restricted to 64KB_R_X and 64KB_Z_X swizzle modes.
+ * In some cases we could change the swizzle of the
+ * destination texture instead, but the more general
+ * solution is to implement compute shader resolve.
*/
src->last_msaa_resolve_target_micro_mode =
dst->surface.micro_tile_mode;