diff options
| author | Samuel Pitoiset <[email protected]> | 2017-10-24 17:23:43 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-10-25 11:46:53 +0200 |
| commit | 9711979df007859de86fc08c20c826a71d10a660 (patch) | |
| tree | 5217bfba1170ba448d5059f6ec4515e8f7ae9d0e /src/amd/vulkan/radv_pipeline.c | |
| parent | 5bfbab2fdcc5b1fcb3a0d0b8cce19c5492c7de68 (diff) | |
radv: print NIR before LLVM IR and disassembly
It's still printed after linking, but it makes more sense to
have SPIRV->NIR->LLVM IR->ASM.
Fixes: f0a2bbd1a4 (radv: move nir print after linking is done)
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_pipeline.c')
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 926e3788cc2..aaaafbefa93 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -1810,6 +1810,14 @@ void radv_create_shaders(struct radv_pipeline *pipeline, radv_link_shaders(pipeline, nir); + for (int i = 0; i < MESA_SHADER_STAGES; ++i) { + if (!(device->instance->debug_flags & RADV_DEBUG_DUMP_SHADERS)) + continue; + + if (modules[i]) + nir_print_shader(nir[i], stderr); + } + if (nir[MESA_SHADER_FRAGMENT]) { if (!pipeline->shaders[MESA_SHADER_FRAGMENT]) { pipeline->shaders[MESA_SHADER_FRAGMENT] = @@ -1894,13 +1902,8 @@ void radv_create_shaders(struct radv_pipeline *pipeline, for (int i = 0; i < MESA_SHADER_STAGES; ++i) { free(codes[i]); - if (modules[i]) { - if (device->instance->debug_flags & RADV_DEBUG_DUMP_SHADERS) - nir_print_shader(nir[i], stderr); - - if (!pipeline->device->trace_bo) - ralloc_free(nir[i]); - } + if (modules[i] && !pipeline->device->trace_bo) + ralloc_free(nir[i]); } if (fs_m.nir) |