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authorRomain Dolbeau <[email protected]>2019-11-06 19:56:09 +0100
committerBrian Behlendorf <[email protected]>2019-11-06 10:56:09 -0800
commit4254e407294b211f3399da2ee131b45fe9f4ac80 (patch)
tree84343b4bccb01e4d15fb090c4e69dc4a0fcfddf5 /lib/libspl/include
parent27ece2ee4d9a3e814edfc6ff7cbbc56537d94b59 (diff)
Preliminary support for RV64G
This adds basic support for RISC-V, specifically RV64G. Reviewed-by: Brian Behlendorf <[email protected]> Signed-off-by: Romain Dolbeau <[email protected]> Closes #9540
Diffstat (limited to 'lib/libspl/include')
-rw-r--r--lib/libspl/include/sys/isa_defs.h21
1 files changed, 20 insertions, 1 deletions
diff --git a/lib/libspl/include/sys/isa_defs.h b/lib/libspl/include/sys/isa_defs.h
index 7a90e077e..18a41fef9 100644
--- a/lib/libspl/include/sys/isa_defs.h
+++ b/lib/libspl/include/sys/isa_defs.h
@@ -192,10 +192,29 @@ extern "C" {
#define _SUNOS_VTOC_16
+/*
+ * RISC-V arch specific defines
+ * only RV64G (including atomic) LP64 is supported yetxi
+ */
+#elif defined(__riscv) && defined(_LP64) && _LP64 && \
+ defined(__riscv_atomic) && __riscv_atomic
+
+#ifndef __riscv__
+#define __riscv__
+#endif
+
+#ifndef __rv64g__
+#define __rv64g__
+#endif
+
+#define _LITTLE_ENDIAN
+
+#define _SUNOS_VTOC_16
+
#else
/*
* Currently supported:
- * x86_64, i386, arm, powerpc, s390, sparc, and mips
+ * x86_64, i386, arm, powerpc, s390, sparc, mips, and RV64G
*/
#error "Unsupported ISA type"
#endif