1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
|
/*
* Copyright 2010 Dave Airlie
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Dave Airlie
*/
#include "r600_priv.h"
#include "r600d.h"
#include "state_tracker/drm_driver.h"
#include "radeon_drm.h"
struct r600_bo *r600_bo(struct radeon *radeon,
unsigned size, unsigned alignment,
unsigned binding, unsigned usage)
{
struct r600_bo *bo;
struct radeon_bo *rbo;
uint32_t initial_domain, domains;
/* Staging resources particpate in transfers and blits only
* and are used for uploads and downloads from regular
* resources. We generate them internally for some transfers.
*/
if (usage == PIPE_USAGE_STAGING) {
domains = RADEON_GEM_DOMAIN_GTT;
initial_domain = RADEON_GEM_DOMAIN_GTT;
} else {
domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM;
switch(usage) {
case PIPE_USAGE_DYNAMIC:
case PIPE_USAGE_STREAM:
case PIPE_USAGE_STAGING:
initial_domain = RADEON_GEM_DOMAIN_GTT;
break;
case PIPE_USAGE_DEFAULT:
case PIPE_USAGE_STATIC:
case PIPE_USAGE_IMMUTABLE:
default:
initial_domain = RADEON_GEM_DOMAIN_VRAM;
break;
}
}
rbo = radeon_bo(radeon, 0, size, alignment, binding, initial_domain);
if (rbo == NULL) {
return NULL;
}
bo = calloc(1, sizeof(struct r600_bo));
bo->domains = domains;
bo->bo = rbo;
pipe_reference_init(&bo->reference, 1);
return bo;
}
struct r600_bo *r600_bo_handle(struct radeon *radeon, struct winsys_handle *whandle,
unsigned *stride, unsigned *array_mode)
{
struct r600_bo *bo = calloc(1, sizeof(struct r600_bo));
struct radeon_bo *rbo;
rbo = bo->bo = radeon_bo(radeon, whandle->handle, 0, 0, 0, 0);
if (rbo == NULL) {
free(bo);
return NULL;
}
pipe_reference_init(&bo->reference, 1);
bo->domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM;
if (stride)
*stride = whandle->stride;
if (array_mode) {
enum radeon_bo_layout micro, macro;
radeon->ws->buffer_get_tiling(rbo->buf, µ, ¯o);
if (macro == RADEON_LAYOUT_TILED)
*array_mode = V_0280A0_ARRAY_2D_TILED_THIN1;
else if (micro == RADEON_LAYOUT_TILED)
*array_mode = V_0280A0_ARRAY_1D_TILED_THIN1;
else
*array_mode = 0;
}
return bo;
}
void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, struct radeon_winsys_cs *cs, unsigned usage)
{
return radeon->ws->buffer_map(bo->bo->buf, cs, usage);
}
void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo)
{
radeon->ws->buffer_unmap(bo->bo->buf);
}
void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo)
{
radeon_bo_reference(radeon, &bo->bo, NULL);
free(bo);
}
boolean r600_bo_get_winsys_handle(struct radeon *radeon, struct r600_bo *bo,
unsigned stride, struct winsys_handle *whandle)
{
return radeon->ws->buffer_get_handle(bo->bo->buf, stride, whandle);
}
|