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Mesa 17.0.2 Release Notes / March 20, 2017
==========================================
Mesa 17.0.2 is a bug fix release which fixes bugs found since the 17.0.1
release.
Mesa 17.0.2 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being
used. Some drivers don't support all the features required in OpenGL
4.5. OpenGL 4.5 is **only** available if requested at context creation
because compatibility contexts are not supported.
SHA256 checksums
----------------
::
2e0f41e7974ba7a36ca32bbeaf8ebcd65c8fd4d2dc9872f04d4becbd5e7a8cb5 mesa-17.0.2.tar.gz
f8f191f909e01e65de38d5bdea5fb057f21649a3aed20948be02348e77a689d4 mesa-17.0.2.tar.xz
New features
------------
None
Bug fixes
---------
- `Bug 68504 <https://bugs.freedesktop.org/show_bug.cgi?id=68504>`__ -
9.2-rc1 workaround for clover build failure on ppc/altivec: cannot
convert 'bool' to '__vector(4) \__bool int' in return
- `Bug 97988 <https://bugs.freedesktop.org/show_bug.cgi?id=97988>`__ -
[radeonsi] playing back videos with VDPAU exhibits
deinterlacing/anti-aliasing issues not visible with VA-API
- `Bug 99484 <https://bugs.freedesktop.org/show_bug.cgi?id=99484>`__ -
Crusader Kings 2 - Loading bars, siege bars, morale bars, etc. do not
render correctly
- `Bug 99715 <https://bugs.freedesktop.org/show_bug.cgi?id=99715>`__ -
Don't print: "Note: Buggy applications may crash, if they do please
report to vendor"
- `Bug 100049 <https://bugs.freedesktop.org/show_bug.cgi?id=100049>`__
- "ralloc: Make sure ralloc() allocations match malloc()'s
alignment." causes seg fault in 32bit build
Changes
-------
Alex Smith (3):
- radv: Emit pending flushes before executing a secondary command
buffer
- radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer
- radv/ac: Fix shared memory offset calculation
Bas Nieuwenhuizen (3):
- radv: Disable HTILE for textures with multiple layers/levels.
- radv: Emit cache flushes before CP DMA.
- Revert "radv: Emit cache flushes before CP DMA."
Dave Airlie (3):
- radv: drop Z24 support.
- radv: disable mip point pre clamping.
- radv: setup llvm target data layout
Emil Velikov (4):
- docs: add sha256 checksums for 17.0.1
- cherry-ignore: add the swizzle blorp_clear fix
- i965: move brw_define.h ifndef guard to the top
- Update version to 17.0.2
Fredrik Höglund (2):
- radv: fix the dynamic buffer index in vkCmdBindDescriptorSets
- radv/ac: fix multiple descriptor sets with dynamic buffers
Gregory Hainaut (1):
- glapi: fix typo in count_scale
Ilia Mirkin (2):
- nvc0: take extra pushbuf space into account for pushbuf_space calls
- nvc0: increase alignment to 256 for texture buffers on fermi
Jacob Lifshay (1):
- vulkan/wsi: Improve the DRI3 error message
James Legg (1):
- radv: Fix using more than 4 bound descriptor sets
Jason Ekstrand (7):
- anv/blorp/clear_subpass: Only set surface clear color for fast clears
- anv: Accurately advertise dynamic descriptor limits
- anv: Stall before fast-clear operations
- anv: Properly handle destroying NULL devices and instances
- anv/blorp: Turn off AUX after doing a CCS_D resolve
- anv/blorp: Only set a clear color for resolves if fast-cleared
- nir/intrinsics: Make load_barycentric_input take a 2-component coor
Jonas Pfeil (1):
- ralloc: Make sure ralloc() allocations match malloc()'s alignment.
Kenneth Graunke (1):
- egl: Ensure ResetNotificationStrategy matches for shared contexts.
Marek Olšák (3):
- st/mesa: reset sample_mask, min_sample, and render_condition for PBO
ops
- st/mesa: set blend state for PBO readbacks
- radeonsi: mark all bound shader buffer ranges as initialized
Matt Turner (1):
- clover: Work around build failure with AltiVec.
Nanley Chery (2):
- anv/pass: Avoid accessing attachment array out of bounds
- anv/image: Remove extra dependency on HiZ-specific variable
Nicolai Hähnle (2):
- st/glsl_to_tgsi: avoid iterating past the head of the instruction
list
- st/mesa: inform the driver of framebuffer changes before compute
dispatches
Robert Foss (1):
- mesa: Avoid read of uninitialized variable
Samuel Iglesias Gonsálvez (5):
- i965/fs: mark last DF uniform array element as 64 bit live one
- i965/fs: detect different bit size accesses to uniforms to push them
in proper locations
- i965/fs: fix indirect load DF uniforms on BSW/BXT
- i965/fs: fix source type when emitting MOV_INDIRECT to read ICP
handles
- i965/fs: emit MOV_INDIRECT with the source with the right register
type
Samuel Pitoiset (1):
- radeonsi: disable sinking common instructions down to the end block
|
