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* nir: handle get_buffer_size in nir_lower_atomics_to_ssboRob Clark2017-11-101-0/+1
* anv/meson: Generate dev_icd.jsonChad Versace2017-11-091-0/+12
* anv: Fix architecture in intel_icd.{arch}.jsonChad Versace2017-11-091-1/+1
* radv: Fix architecture in radeon_icd.{arch}.jsonChad Versace2017-11-091-1/+1
* anv: Refactor anv_GetImageSubresourceLayout()Chad Versace2017-11-091-21/+11
* anv/image: Refactor choice of isl_tiling_flags_tChad Versace2017-11-091-13/+31
* anv: Refactor anv_get_format_plane() - explicit unsupportedChad Versace2017-11-091-4/+4
* anv: Remove anv_physical_device_get_format_properties()Chad Versace2017-11-091-23/+13
* anv: Simplify anv_physical_device_get_format_properties()Chad Versace2017-11-091-16/+9
* anv: Simplify anv_get_image_format_properties()Chad Versace2017-11-091-14/+3
* anv: Rename get_image_format_properties()Chad Versace2017-11-091-12/+12
* anv: Fix get_image_format_properties() - YCbCrChad Versace2017-11-091-46/+40
* anv: Fix get_image_format_properties() - 3-channel formatsChad Versace2017-11-091-19/+15
* anv: Refactor get_image_format_properties() - Reduce paramsChad Versace2017-11-091-11/+21
* anv: Refactor get_image_format_properties() - base_isl_formatChad Versace2017-11-091-3/+4
* anv: Refactor get_image_format_properties() - plane_formatChad Versace2017-11-091-8/+8
* anv: Refactor get_image_format_properties() - ASTCChad Versace2017-11-091-4/+5
* anv: Refactor get_image_format_properties() - depthstencil (v2)Chad Versace2017-11-091-16/+31
* anv: Better types for 'aspect' function paramsChad Versace2017-11-093-13/+5
* anv: Refactor get_buffer_format_properties()Chad Versace2017-11-091-15/+29
* broadcom/vc4: Fix simulator mode for the MADVISE usage.Eric Anholt2017-11-091-0/+4
* mesa: enable ARB_texture_buffer_* extensions in the Compatibility profileMarek Olšák2017-11-0911-35/+40
* r600: add support for hw atomic counters. (v3)Dave Airlie2017-11-107-22/+480
* st/mesa: add support for hw atomics to glsl->tgsi. (v5)Dave Airlie2017-11-101-15/+87
* st/mesa: setup hw atomic limits. (v1.1)Dave Airlie2017-11-101-10/+35
* st/mesa: start adding support for hw atomics atom. (v2)Dave Airlie2017-11-105-4/+48
* mesa/program: add hw atomic counter fileDave Airlie2017-11-101-0/+1
* gallium: add hw atomic buffer binding API.Dave Airlie2017-11-102-0/+24
* gallium/tgsi: start adding hw atomics (v3.2)Dave Airlie2017-11-106-3/+121
* gallium: add CAPs to support HW atomic counters. (v3)Dave Airlie2017-11-1015-1/+34
* r600/query: drop rest of vi workaround code.Dave Airlie2017-11-102-37/+13
* st/mesa: remove 'struct' keyword on function parameterBrian Paul2017-11-091-2/+1
* mesa: s/GLint/gl_buffer_index/ for _ColorDrawBufferIndexesBrian Paul2017-11-099-26/+27
* mesa: s/GLint/gl_buffer_index/ for _ColorReadBufferIndexBrian Paul2017-11-091-1/+1
* mesa: minor reformatting, add const to gl_external_samplers()Brian Paul2017-11-091-1/+4
* st/mesa: whitespace clean-up in st_mesa_to_tgsi.cBrian Paul2017-11-091-167/+169
* i965: Pretend there are 4 subslices for compute shader threads on Gen9+.Kenneth Graunke2017-11-091-1/+13
* broadcom/vc4: Mark BOs as purgeable when they enter the BO cacheBoris Brezillon2017-11-093-48/+86
* meson: Enable VC4's NEON assembly support.Eric Anholt2017-11-091-0/+13
* meson: Always link libgallium_dri.so against dep_thread.Eric Anholt2017-11-091-0/+1
* Revert "glx: Implement GLX_EXT_no_config_context (v2)"Adam Jackson2017-11-096-31/+13
* radeonsi: pack r600_surface betterMarek Olšák2017-11-091-11/+11
* radeonsi: pack r600_texture betterMarek Olšák2017-11-091-27/+26
* radeonsi: clean up r600_surfaceMarek Olšák2017-11-092-29/+11
* radeonsi: remove r600_texture::non_disp_tilingMarek Olšák2017-11-092-9/+0
* radeonsi: remove DBG_NO_DISCARD_RANGEMarek Olšák2017-11-093-5/+0
* glx: Implement GLX_EXT_no_config_context (v2)Adam Jackson2017-11-096-13/+31
* glx: Prepare the DRI backends for GLX_EXT_no_config_contextAdam Jackson2017-11-093-6/+7
* glx: Relax validate_renderType_against_config for EXT_no_config_contextAdam Jackson2017-11-091-13/+17
* anv: fix build failureNicolai Hähnle2017-11-091-2/+2
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